Product details

Protocols DVI, HDMI Speed (Max) (Gbps) 3.96 Supply voltage (V) 3.3 Operating temperature range (C) 0 to 70
Protocols DVI, HDMI Speed (Max) (Gbps) 3.96 Supply voltage (V) 3.3 Operating temperature range (C) 0 to 70
HTQFP (PZP) 100 256 mm² 16 x 16
  • Supports pixel rates up to 165 MHz (including 1080p and WUXGA at 60 Hz)
  • Digital visual interface (DVI) specification compliant (1)
  • True-color, 24-bit/pixel, 16.7M colors at 1 or 2 pixels per clock
  • Laser trimmed internal termination resistors for optimum fixed impedance matching
  • Skew tolerant up to one pixel-clock cycle
  • 4× oversampling
  • Reduced power consumption – 1.8-V core operation with 3.3-V I/Os and supplies (2)
  • Reduced ground bounce using time-staggered pixel outputs
  • Low noise and good power dissipation using TI PowerPAD™ packaging
  • Advanced technology using TI 0.18-µm EPIC-5 CMOS process
  • TFP401A incorporates HSYNC jitter immunity (3)

(1)The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays. The TPF401 and TFP401A are compliant with the DVI Specification Rev. 1.0.

(2)The TFP401/401A has an internal voltage regulator that provides the 1.8-V core power supply from the external 3.3-V supplies.

(3)The TFP401A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.

  • Supports pixel rates up to 165 MHz (including 1080p and WUXGA at 60 Hz)
  • Digital visual interface (DVI) specification compliant (1)
  • True-color, 24-bit/pixel, 16.7M colors at 1 or 2 pixels per clock
  • Laser trimmed internal termination resistors for optimum fixed impedance matching
  • Skew tolerant up to one pixel-clock cycle
  • 4× oversampling
  • Reduced power consumption – 1.8-V core operation with 3.3-V I/Os and supplies (2)
  • Reduced ground bounce using time-staggered pixel outputs
  • Low noise and good power dissipation using TI PowerPAD™ packaging
  • Advanced technology using TI 0.18-µm EPIC-5 CMOS process
  • TFP401A incorporates HSYNC jitter immunity (3)

(1)The Digital Visual Interface Specification, DVI, is an industry standard developed by the Digital Display Working Group (DDWG) for high-speed digital connection to digital displays. The TPF401 and TFP401A are compliant with the DVI Specification Rev. 1.0.

(2)The TFP401/401A has an internal voltage regulator that provides the 1.8-V core power supply from the external 3.3-V supplies.

(3)The TFP401A incorporates additional circuitry to create a stable HSYNC from DVI transmitters that introduce undesirable jitter on the transmitted HSYNC signal.

The Texas Instruments TFP401 and TFP401A are TI PanelBus™ flat-panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP401/401A finds applications in any design requiring high-speed digital interface.

The TFP401 and TFP401A supports display resolutions up to 1080p and WUXGA in 24-bit true-color pixel format. The TFP401 and TFP401A offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time-staggered pixel outputs for reduced ground bounce.

PowerPAD advanced packaging technology results in best-of-class power dissipation, footprint, and ultralow ground inductance.

The TFP401 and TFP401A combines PanelBus circuit innovation with TI’s advanced 0.18-µm EPIC-5 CMOS process technology, along with TI PowerPAD package technology to achieve a reliable, low-powered, low-noise, high-speed digital interface solution.

The Texas Instruments TFP401 and TFP401A are TI PanelBus™ flat-panel display products, part of a comprehensive family of end-to-end DVI 1.0 compliant solutions. Targeted primarily at desktop LCD monitors and digital projectors, the TFP401/401A finds applications in any design requiring high-speed digital interface.

The TFP401 and TFP401A supports display resolutions up to 1080p and WUXGA in 24-bit true-color pixel format. The TFP401 and TFP401A offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time-staggered pixel outputs for reduced ground bounce.

PowerPAD advanced packaging technology results in best-of-class power dissipation, footprint, and ultralow ground inductance.

The TFP401 and TFP401A combines PanelBus circuit innovation with TI’s advanced 0.18-µm EPIC-5 CMOS process technology, along with TI PowerPAD package technology to achieve a reliable, low-powered, low-noise, high-speed digital interface solution.

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Technical documentation

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Type Title Date
* Data sheet TFP401x TI PanelBus Digital Receiver datasheet (Rev. H) PDF | HTML 25 Mar 2022
* Errata TFP101(A), TFP201(A), TFP401(A) Errata 11 Nov 2003
* Errata TFP101/A, TFP201/A, TFP401/A, TFP403 Data Sheet Errata 27 Jun 2003
Application note TFPxxx FAQ (Rev. A) 02 May 2019
Application note How to Bridge HDMI/DVI to LVDS/OLDI (Rev. C) 07 Jun 2018
Application note PanelBus TFP401/401A Design Notes 18 Mar 2003
Application note TFP101/201/401(A) 2Pix/Clk Output Mode 18 Mar 2003

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