SLOS423H September   2003  – December 2015 THS3091 , THS3095

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics THS3091
    6. 6.6  Electrical Characteristics THS3095
    7. 6.7  Dissipation Ratings Table
    8. 6.8  Typical Characteristics
    9. 6.9  Typical Characteristics (±15 V)
    10. 6.10 Typical Characteristics (±5 V)
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Feature Description
      1. 7.2.1 Saving Power With Power-Down Functionality and Setting Threshold Levels With the Reference Pin
      2. 7.2.2 Power-Down Reference Pin Operation
    3. 7.3 Device Functional Modes
      1. 7.3.1 Wideband, Noninverting Operation
      2. 7.3.2 Wideband, Inverting Operation
      3. 7.3.3 Single-Supply Operation
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Video Distribution
      2. 8.1.2 Driving Capacitive Loads
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 PowerPAD Design Considerations
      1. 10.3.1 PowerPAD Layout Considerations
      2. 10.3.2 Power Dissipation and Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Fixtures, Spice Models, and Application Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Related Links
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DDA|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
VS- to VS+ Supply voltage 33 V
VI Input voltage ±VS
VID Differential input voltage 4 ±V
IO Output current 350 mA
Continuous power dissipation See ESD Ratings
TJ Maximum junction temperature 150 °C
TJ(2) Maximum junction temperature, continuous operation, long-term reliability 125 °C
Tstg Storage temperature –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may result in reduced reliability and/or lifetime of the device.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Supply voltage Dual supply ±5 ±15 ±16 V
Single supply 10 30 32
TA Operating free-air temperature –40 85 °C

6.4 Thermal Information

THERMAL METRIC(1) THS309x UNIT
D (SOIC) DDA (SO PowerPAD)(3)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 113.5 51.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 57.7 58.3 °C/W
RθJB Junction-to-board thermal resistance 54.2 32.3 °C/W
ψJT Junction-to-top characterization parameter 11.5 12.2 °C/W
ψJB Junction-to-board characterization parameter 53.7 32.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a 7.8 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics THS3091

VS = ±15 V, RF = 1.21 kΩ, RL = 100 Ω, and G = 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
Small-signal bandwidth, –3
dB
G = 1, RF = 1.78 kΩ, VO = 200 mVPP TA = 25°C 235 MHz
G = 2, RF = 1.21 kΩ, VO = 200 mVPP TA = 25°C 210
G = 5, RF = 1 kΩ, VO = 200 mVPP TA = 25°C 190
G = 10, RF = 866 Ω, VO = 200 mVPP TA = 25°C 180
0.1-dB Bandwidth flatness G = 2, RF = 1.21 kΩ, VO = 200 mVPP TA = 25°C 95
Large-signal bandwidth G = 5, RF = 1 kΩ , VO = 4 VPP TA = 25°C 135
Slew rate (25% to 75% level) G = 2, VO = 10-V step, RF = 1.21 kΩ TA = 25°C 5000 V/μs
G = 5, VO = 20-V step, RF = 1 kΩ TA = 25°C 7300
Rise and fall time G = 2, VO = 5-VPP, RF = 1.21 kΩ TA = 25°C 5 ns
Settling time to 0.1% G = –2, VO = 2 VPP step TA = 25°C 42 ns
Settling time to 0.01% G = –2, VO = 2 VPP step TA = 25°C 72
HARMONIC DISTORTION
2nd Harmonic distortion G = 2, RF = 1.21 kΩ,
VO = 2 VPP, f = 10 MHz
RL = 100Ω TA = 25°C 66 dBc
RL = 1 kΩ TA = 25°C 77
3rd Harmonic distortion RL = 100 Ω TA = 25°C 74
RL = 1 kΩ TA = 25°C 69
Input voltage noise f > 10 kHz TA = 25°C 2 nV / √Hz
Noninverting input current noise f > 10 kHz TA = 25°C 14 pA / √Hz
Inverting input current noise f > 10 kHz TA = 25°C 17 pA / √Hz
Differential gain G = 2, RL = 150 Ω, RF = 1.21 kΩ NTSC TA = 25°C 0.013%
PAL TA = 25°C 0.011%
Differential phase NTSC TA = 25°C 0.020°
PAL TA = 25°C 0.026°
DC PERFORMANCE
Transimpedance VO = ±7.5 V, Gain = 1 TA = 25°C 850
TA = 25°C 350
TA = 0°C to 70°C 300
TA = –40°C to 85°C 300
Input offset voltage VCM = 0 V TA = 25°C 0.9 mV
TA= 25°C 3
TA = 0°C to 70°C 4
TA = –40°C to 85°C 4
Average offset voltage drift VCM = 0 V TA = 0°C to 70°C ±10 μV/°C
TA = –40°C to 85°C ±10
Noninverting input bias current VCM = 0 V TA = 25°C 4 μA
TA= 25°C 15
TA = 0°C to 70°C 20
TA = –40°C to 85°C 20
Average bias current drift VCM = 0 V TA = 0°C to 70°C ±20 nA/°C
TA = –40°C to 85°C ±20
Inverting input bias current VCM = 0 V TA = 25°C 3.5 μA
TA= 25°C 15
TA = 0°C to 70°C 20
–40°C to 85°C 20
Average bias current drift VCM = 0 V TA = 0°C to 70°C ±20 nA/°C
TA = –40°C to 85°C ±20
Input offset current VCM = 0 V TA = 25°C 1.7 μA
TA= 25°C 10
TA = 0°C to 70°C 15
TA = –40°C to 85°C 15
Average offset current drift VCM = 0 V TA = 0°C to 70°C ±20 nA/°C
TA = –40°C to 85°C ±20
INPUT CHARACTERISTICS
Common-mode input range TA = 25°C ±13.6 V
TA= 25°C ±13.3
TA = 0°C to 70°C ±13
TA = –40°C to 85°C ±13
Common-mode rejection ratio VCM = ±10 V TA = 25°C 69 dB
TA= 25°C 62
TA = 0°C to 70°C 59
TA = –40°C to 85°C 59
Noninverting input resistance TA = 25°C 1.3
Noninverting input capacitance TA = 25°C 0.1 pF
Inverting input resistance TA = 25°C 30 Ω
Inverting input capacitance TA = 25°C 1.4 pF
OUTPUT CHARACTERISTICS
Output voltage swing RL = 1 kΩ TA = 25°C ±13.2 V
TA = 25°C ±12.8
TA = 0°C to 70°C ±12.5
TA = –40°C to 85°C ±12.5
RL = 100 Ω TA = 25°C ±12.5
TA= 25°C ±12.1
TA = 0°C to 70°C ±11.8
TA = –40°C to 85°C ±11.8
Output current (sourcing) RL = 40 Ω TA= 25°C 280 mA
TA = 25°C 225
TA = 0°C to 70°C 200
TA = –40°C to 85°C 200
Output current (sinking) RL = 40 Ω TA = 25°C 250 mA
TA= 25°C 200
TA = 0°C to 70°C 175
TA = –40°C to 85°C 175
Output impedance f = 1 MHz, Closed loop TA = 25°C 0.06 Ω
POWER SUPPLY
Specified operating voltage TA = 25°C ±15 V
TA= 25°C ±16
TA = 0°C to 70°C ±16
TA = –40°C to 85°C ±16
Maximum quiescent current TA = 25°C 9.5 mA
TA= 25°C 10.5
TA = 0°C to 70°C 11
TA = –40°C to 85°C 11
Minimum quiescent current TA = 25°C 9.5 mA
TA= 25°C 8.5
TA = 0°C to 70°C 8
TA = –40°C to 85°C 8
Power supply rejection (+PSRR) VS+ = 15.5 V to 14.5 V, VS– = 15 V TA = 25°C 75 dB
TA= 25°C 70
TA = 0°C to 70°C 65
TA = –40°C to 85°C 65
Power supply rejection (–PSRR) VS+ = 15 V, VS– = –15.5 V to –14.5 V TA = 25°C 73 dB
TA= 25°C 68
TA = 0°C to 70°C 65
TA = –40°C to 85°C 65
POWER-DOWN CHARACTERISTICS (THS3091 ONLY)
REF voltage range(1) TA = 25°C VS+ –4 V
TA = 25°C VS–
Power-down voltage level(1) Enable TA = 25°C PD ≥ REF +2 V
Disable TA = 25°C PD ≤ REF +.8
Power-down quiescent current PD = 0V TA = 25°C 500 μA
TA= 25°C 700
TA = 0°C to 70°C 800
TA = –40°C to 85°C 800
VPD quiescent current VPD = 0 V, REF = 0 V, TA = 25°C 11 μA
TA= 25°C 15
TA = 0°C to 70°C 20
TA = –40°C to 85°C 20
VPD = 3.3 V, REF = 0 V TA = 25°C 11
TA= 25°C 15
TA = 0°C to 70°C 20
TA = –40°C to 85°C 20
Turnon time delay 90% of final value TA = 25°C 60 μs
Turnoff time delay 10% of final value TA = 25°C 150
(1) For detailed information on the behavior of the power-down circuit, see the power-down functionality and power-down reference sections in the Application Information section of this data sheet.

6.6 Electrical Characteristics THS3095

VS = ±5 V, RF = 1.15 kΩ, RL = 100 Ω, and G = 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
AC PERFORMANCE
Small-signal bandwidth, –3 dB G = 1, RF = 1.78 kΩ, VO = 200 mVPP TA= 25°C 190 MHz
G = 2, RF = 1.15 kΩ, VO = 200 mVPP TA= 25°C 180
G = 5, RF = 1 kΩ, VO = 200 mVPP TA= 25°C 160
G = 10, RF = 866 Ω, VO = 200 mVPP TA= 25°C 150
0.1-dB Bandwidth flatness G = 2, RF = 1.15 kΩ, VO = 200 mVPP TA= 25°C 65
Large-signal bandwidth G = 2, RF = 1.15 kΩ , VO = 4 VPP TA= 25°C 160
Slew rate (25% to 75% level) G = 2, VO= 5-V step, RF = 1.21 kΩ TA= 25°C 1400 V/μs
G = 5, VO= 5-V step, RF = 1 kΩ TA= 25°C 1900
Rise and fall time G = 2, VO = 5-V step, RF = 1.21 kΩ TA= 25°C 5 ns
Settling time to 0.1% G = –2, VO = 2 VPP step TA= 25°C 35 ns
Settling time to 0.01% G = –2, VO = 2 VPP step TA= 25°C 73
HARMONIC DISTORTION
2nd Harmonic distortion G = 2, RF = 1.15 kΩ,
VO = 2 VPP, f = 10 MHz
RL = 100 Ω TA = 25°C 77 dBc
RL = 1 kΩ TA = 25°C 73
3rd Harmonic distortion RL = 100 Ω TA = 25°C 70
RL = 1 kΩ TA = 25°C 68
Input voltage noise f > 10 kHz TA = 25°C 2 nV / √Hz
Noninverting input current noise f > 10 kHz TA = 25°C 14 pA / √Hz
Inverting input current noise f > 10 kHz TA = 25°C 17 pA / √Hz
Differential gain G = 2, RL = 150 Ω,
RF = 1.15 kΩ
NTSC TA = 25°C 0.027%
PAL TA = 25°C 0.025%
Differential phase NTSC TA = 25°C 0.04°
PAL TA = 25°C 0.05°
DC PERFORMANCE
Transimpedance VO = ±2.5 V, Gain = 1 TA = 25°C 700
TA= 25°C 250
TA= 0°C to 70°C 200
TA= –40°C to 85°C 200
Input offset voltage VCM = 0 V TA = 25°C 0.3 mV
TA= 25°C 2
TA= 0°C to 70°C 3
TA= –40°C to 85°C 3
Average offset voltage drift VCM = 0 V TA= 0°C to 70°C ±10 μV/°C
TA= –40°C to 85°C ±10
Noninverting input bias current VCM = 0 V TA = 25°C 2 μA
TA= 25°C 15
TA= 0°C to 70°C 20
TA= –40°C to 85°C 20
Average bias current drift VCM = 0 V TA= 0°C to 70°C ±20 nA/°C
TA= –40°C to 85°C ±20
Inverting input bias current VCM = 0 V TA = 25°C 5 μA
TA= 25°C 15
TA= 0°C to 70°C 20
TA= –40°C to 85°C 20
Average bias current drift VCM = 0 V TA= 0°C to 70°C ±20 nA/°C
TA= –40°C to 85°C ±20
Input offset current VCM = 0 V TA = 25°C 1 μA
TA= 25°C 10
TA= 0°C to 70°C 15
TA= –40°C to 85°C 15
Average offset current drift VCM = 0 V TA= 0°C to 70°C ±20 nA/°C
TA= –40°C to 85°C ±20
INPUT CHARACTERISTICS
Common-mode input range TA = 25°C ±3.6 V
TA= 25°C ±3.3
TA= 0°C to 70°C ±3
TA= –40°C to 85°C ±3
Common-mode rejection ratio VCM = ±2.0 V, VO = 0 V TA = 25°C 66 dB
TA= 25°C 60
TA= 0°C to 70°C 57
TA= –40°C to 85°C 57
Noninverting input resistance TA = 25°C 1.1
Noninverting input capacitance TA = 25°C 1.2 pF
Inverting input resistance TA = 25°C 32 Ω
Inverting input capacitance TA = 25°C 1.5 pF
OUTPUT CHARACTERISTICS
Output voltage swing RL = 1 kΩ TA = 25°C ±3.4 V
TA= 25°C ±3.1
TA= 0°C to 70°C ±2.8
TA= –40°C to 85°C ±2.8
RL = 100 Ω TA = 25°C ±3.1
TA= 25°C ±2.7
TA= 0°C to 70°C ±2.5
TA= –40°C to 85°C ±2.5
Output current (sourcing) RL = 10 Ω TA = 25°C 180 mA
TA= 25°C 140
TA= 0°C to 70°C 120
TA= –40°C to 85°C 120
Output current (sinking) RL = 10 Ω TA = 25°C –160 mA
TA= 25°C –140
TA= 0°C to 70°C –120
TA= –40°C to 85°C –120
Output impedance f = 1 MHz, Closed loop TA = 25°C 0.09 Ω
POWER SUPPLY
Specified operating voltage TA = 25°C ±5 V
TA= 25°C ±4.5
TA= 0°C to 70°C ±4.5
TA= –40°C to 85°C ±4.5
Maximum quiescent current TA = 25°C 8.2 mA
TA= 25°C 9
TA= 0°C to 70°C 9.5
TA= –40°C to 85°C 9.5
Minimum quiescent current TA = 25°C 8.2 mA
TA= 25°C 7
TA= 0°C to 70°C 6.5
TA= –40°C to 85°C 6.5
Power supply rejection (+PSRR) VS+ = 5.5 V to 4.5 V, VS– = 5 V TA = 25°C 73 dB
TA= 25°C 68
TA= 0°C to 70°C 63
TA= –40°C to 85°C 63
Power supply rejection (–PSRR) VS+ = 5 V, VS– = –4.5 V to –5.5 V TA = 25°C 71 dB
TA= 25°C 65
TA= 0°C to 70°C 60
TA= –40°C to 85°C 60
POWER-DOWN CHARACTERISTICS (THS3095 ONLY)
REF voltage range(1) TA = 25°C VS+ –4 V
TA = 25°C VS–
Power-down voltage level(1) Enable TA = 25°C PD ≥ REF 2 V
Disable TA = 25°C PD ≤ REF 0.8
Power-down quiescent current PD = 0V TA = 25°C 300 μA
TA= 25°C 500
TA= 0°C to 70°C 600
TA= –40°C to 85°C 600
VPD quiescent current VPD = 0 V, REF = 0 V, TA = 25°C 11 μA
TA= 25°C 15
TA= 0°C to 70°C 20
TA–40°C to 85°C 20
VPD = 3.3 V, REF = 0 V TA = 25°C 11
TA= 25°C 15
TA= 0°C to 70°C 20
TA= –40°C to 85°C 20
Turnon time delay 90% of final value TA = 25°C 60 μs
Turnoff time delay 10% of final value TA = 25°C 150
(1) For detailed information on the behavior of the power-down circuit, see the power-down functionality and power-down reference sections in the Application Information section of this data sheet.

6.7 Dissipation Ratings Table

PACKAGE θJC (°C/W) θJA (°C/W)(1) POWER RATING (2)
TJ = 125°C
TA = 25°C TA = 85°C
D-8 38.3 97.5 1.02 W 410 mW
DDA-8 9.2 45.8 2.18 W 873 mW
(1) This data was taken using the JEDEC standard High-K test PCB.
(2) Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to substantially increase. Thermal management of the final PCB should strive to keep the junction temperature at or below 125°C for best performance and long-term reliability.
(3) The THS3091 and THS3095 may incorporate a PowerPAD on the underside of the chip. This acts as a heatsink and must be connected to a thermally dissipating plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature which could permanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing the PowerPAD thermally enhanced package.

6.8 Typical Characteristics

Table 1. Table Of Graphs

±15-V GRAPHS FIGURE
Noninverting small-signal frequency response Figure 1, Figure 2
Inverting small-signal frequency response Figure 3
0.1-dB gain flatness frequency response Figure 4
Noninverting large-signal frequency response Figure 5
Inverting large-signal frequency response Figure 6
Capacitive load frequency response Figure 7
Recommended RISO vs Capacitive load Figure 8
2nd Harmonic distortion vs Frequency Figure 9, Figure 11
3rd Harmonic distortion vs Frequency Figure 10, Figure 12
2nd Harmonic distortion vs Frequency Figure 13
3rd Harmonic distortion vs Frequency Figure 14
Harmonic distortion vs Output voltage swing Figure 15, Figure 16
Slew rate vs Output voltage step Figure 17, Figure 18, Figure 19
Noise vs Frequency Figure 20
Settling time Figure 21, Figure 22
Quiescent current vs Supply voltage Figure 23
Quiescent current vs Frequency Figure 24
Output voltage vs Load resistance Figure 25
Input bias and offset current vs Case temperature Figure 26
Input offset voltage vs Case temperature Figure 27
Transimpedance vs Frequency Figure 28
Rejection ratio vs Frequency Figure 29
Noninverting small-signal transient response Figure 30
Inverting large-signal transient response Figure 31, Figure 32
Overdrive recovery time Figure 33
Differential gain vs Number of loads Figure 34
Differential phase vs Number of loads Figure 35
Closed-Loop output impedance vs Frequency Figure 36
Power-down quiescent current vs Supply voltage Figure 37
Turnon and turnoff time delay Figure 38

Table 2. Table Of Graphs (Continued)

±5-V GRAPHS FIGURE
Noninverting small-signal frequency response Figure 39
Inverting small-signal frequency response Figure 40
0.1-dB gain flatness frequency response Figure 41
Noninverting large-signal frequency response Figure 42
Inverting large-signal frequency response Figure 43
Settling time Figure 44
2nd Harmonic distortion vs Frequency Figure 45, Figure 47
3rd Harmonic distortion vs Frequency Figure 46, Figure 48
Harmonic distortion vs Output voltage swing Figure 49, Figure 50
Slew rate vs Output voltage step Figure 51, Figure 52, Figure 53
Quiescent current vs Frequency Figure 54
Output voltage vs Load resistance Figure 55
Input bias and offset current vs Case temperature Figure 56
Overdrive recovery time Figure 57
Rejection ratio vs Frequency Figure 58

6.9 Typical Characteristics (±15 V)

THS3091 THS3095 ssg2_v_fr_los423.gif Figure 1. Noninverting Small-Signal Frequency Response
THS3091 THS3095 ssg-10_v_fr_los423.gif Figure 3. Inverting Small-Signal Frequency Response
THS3091 THS3095 lsg5_v15_fr_los423.gif Figure 5. Noninverting Large-Signal Frequency Response
THS3091 THS3095 fr_v15_cl_los423.gif Figure 7. Capacitive Load Frequency Response
THS3091 THS3095 HD2V15_v_f_los423.gif Figure 9. 2nd Harmonic Distortion vs Frequency
THS3091 THS3095 hd2_1k_v15_los423.gif Figure 11. 2nd Harmonic Distortion vs Frequency
THS3091 THS3095 hd2nd_v_f_los423.gif Figure 13. 2nd Harmonic Distortion vs Frequency
THS3091 THS3095 hd1mz_v15_vo_los423.gif Figure 15. Harmonic Distortion vs Output Voltage Swing
THS3091 THS3095 sr_g1_v15_los423.gif Figure 17. Slew Rate vs Output Voltage Step
THS3091 THS3095 srg5_v15_vo_los423.gif Figure 19. Slew Rate vs Output Voltage Step
THS3091 THS3095 st_vo125_los423.gif Figure 21. Settling Time
THS3091 THS3095 iq_v15_vs_los423.gif Figure 23. Quiescent Current vs Supply Voltage
THS3091 THS3095 vo_v15_rl_los423.gif Figure 25. Output Voltage vs Load
Resistance
THS3091 THS3095 VOS_v_TC_los423.gif Figure 27. Input Offset Voltage vs Case Temperature
THS3091 THS3095 rej_rate_v_f_los423.gif Figure 29. Rejection Ratio vs Frequency
THS3091 THS3095 lstr_vo6_v15_los423.gif Figure 31. Inverting Large-Signal Transient Response
THS3091 THS3095 ovr_drv_v15_los423.gif Figure 33. Overdrive Recovery Time
THS3091 THS3095 dif_phase_los423.gif Figure 35. Differential Phase vs Number of Loads
THS3091 THS3095 pd_iq_vs_los423.gif Figure 37. Power-Down Quiescent Current vs Supply Voltage
THS3091 THS3095 ssg10_v_fr_los423.gif Figure 2. Noninverting Small-Signal Frequency Response
THS3091 THS3095 db01_15v_los423.gif Figure 4. 0.1-db Gain Flatness Frequency Response
THS3091 THS3095 lsg-5_v15_fr_los423.gif Figure 6. Inverting Large-Signal Frequency Response
THS3091 THS3095 riso_v15_cl_los423.gif Figure 8. Recommended RISO vs Capacitive Load
THS3091 THS3095 HD3V15_v_f_los423.gif Figure 10. 3rd Harmonic Distortion vs Frequency
THS3091 THS3095 hd3_v15_v_1k_los423.gif Figure 12. 3rd Harmonic Distortion vs Frequency
THS3091 THS3095 hd3rd_v_f_los423.gif Figure 14. 3rd Harmonic Distortion vs Frequency
THS3091 THS3095 hd8mz_v15_vo_los423.gif Figure 16. Harmonic Distortion vs Output Voltage Swing
THS3091 THS3095 sr_g2_v15_vo_los423.gif Figure 18. Slew Rate vs Output Voltage Step
THS3091 THS3095 noise_v_freq_los423.gif Figure 20. Noise vs Frequency
THS3091 THS3095 st_vo45_los423.gif Figure 22. Settling Time
THS3091 THS3095 iq_v15_f_los423.gif Figure 24. Quiescent Current vs Frequency
THS3091 THS3095 iib_ios_v_tc_los423.gif Figure 26. Input Bias and Offset Current vs Case Temperature
THS3091 THS3095 trans_v_freq_los423.gif Figure 28. Transimpedance vs Frequency
THS3091 THS3095 sstr_v15_los423.gif Figure 30. Noninverting Small-Signal Transient Response
THS3091 THS3095 lstr_v12_v15_los423.gif Figure 32. Inverting Large-Signal Transient Response
THS3091 THS3095 diff_gain_los423.gif Figure 34. Differential Gain vs Number of Loads
THS3091 THS3095 zo_v_f_los423.gif Figure 36. Closed-Loop Output Impedance vs Frequency
THS3091 THS3095 Ton_Toff_V5_los423.gif Figure 38. Turnon and Turnoff Time Delay

6.10 Typical Characteristics (±5 V)

THS3091 THS3095 ssg10_vs5_los423.gif Figure 39. Noninverting Small-Signal Frequency Response
THS3091 THS3095 db01_vs5_cl_los423.gif Figure 41. 0.1-db Gain Flatness Frequency Response
THS3091 THS3095 ls_fr_vs5_los423.gif Figure 43. Inverting Large-Signal Frequency Response
THS3091 THS3095 hd2_v5_v_f_los423.gif Figure 45. 2nd Harmonic Distortion vs Frequency
THS3091 THS3095 hd2_1k_v5_los423.gif Figure 47. 2nd Harmonic Distortion vs Frequency
THS3091 THS3095 hd_v5_1_vo_los423.gif Figure 49. Harmonic Distortion vs Output Voltage Swing
THS3091 THS3095 srv5_1_vo_los423.gif Figure 51. Slew Rate vs Output Voltage Step
THS3091 THS3095 srv5_3_vo_los423.gif Figure 53. Slew Rate vs Output Voltage Step
THS3091 THS3095 vo_v5_rl_los423.gif Figure 55. Output Voltage vs Load Resistance
THS3091 THS3095 ovrdrv_vs5_los423.gif Figure 57. Overdrive Recovery Time
THS3091 THS3095 ss_fr_vs5_los423.gif Figure 40. Inverting Small-Signal Frequency Response
THS3091 THS3095 lsg_vs5_f_los423.gif Figure 42. Noninverting Large-Signal Frequency Response
THS3091 THS3095 st_1_vs5_los423.gif Figure 44. Settling Time
THS3091 THS3095 hd3_v5_v_f_los423.gif Figure 46. 3rd Harmonic Distortion vs Frequency
THS3091 THS3095 hd3_1k_v5_los423.gif Figure 48. 3rd Harmonic Distortion vs Frequency
THS3091 THS3095 hd_v5_2_vo_los423.gif Figure 50. Harmonic Distortion vs Output Voltage Swing
THS3091 THS3095 srv5_2_vo_los423.gif Figure 52. Slew Rate vs Output Voltage Step
THS3091 THS3095 iq_v5_f_los423.gif Figure 54. Quiescent Current vs Frequency
THS3091 THS3095 iib_ios_v5_los423.gif Figure 56. Input Bias and Offset Current vs Case Temperature
THS3091 THS3095 rejrate_vs5_los423.gif Figure 58. Rejection Ratio vs Frequency