SLLSEY3E May   2018  – May 2019 THVD1410 , THVD1450 , THVD1451 , THVD1452


  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      THVD1410 and THVD1450 Simplified Schematic
      2.      THVD1451 Simplified Schematic
      3.      THVD1452 Simplified Schematic
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
    2.     Pin Functions
    3.     Pin Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  ESD Ratings [IEC]
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Thermal Information
    6. 7.6  Power Dissipation
    7. 7.7  Electrical Characteristics
    8. 7.8  Switching Characteristics
    9. 7.9  Typical Characteristics: All Devices
    10. 7.10 Typical Characteristics: THD1450, THVD1451 and THVD1452
    11. 7.11 Typical Characteristics: THVD1410
  8. Parameter Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
      1. 9.4.1 Device Functional Modes for THVD1410 and THVD1450
      2. 9.4.2 Device Functional Modes for THVD1451
      3. 9.4.3 Device Functional Modes for THVD1452
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. Data Rate and Bus Length
        2. Stub Length
        3. Bus Loading
        4. Receiver Failsafe
        5. Transient Protection
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Device Support
    2. 13.2 Third-Party Products Disclaimer
    3. 13.3 Related Links
    4. 13.4 Receiving Notification of Documentation Updates
    5. 13.5 Community Resources
    6. 13.6 Trademarks
    7. 13.7 Electrostatic Discharge Caution
    8. 13.8 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • DGK|8
  • DRB|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Device Functional Modes for THVD1451

For this device, the driver and receiver are fully enabled, thus the differential outputs Y and Z follow the logic states at data input D at all times. A logic high at D causes Y to turn high and Z to turn low. In this case, the differential output voltage defined as VOD = VY – VZ is positive. When D is low, the output states reverse: Z turns high, Y becomes low, and VOD is negative. The D pin has an internal pull-up resistor to VCC, thus, when left open while the driver is enabled, output Y turns high and Z turns low.

Table 3. Driver Function Table for THVD1451

H H L Actively drive bus high
L L H Actively drive bus low
OPEN H L Actively drive bus High by default

When the differential input voltage defined as VID = VA – VB is higher than the positive input threshold, VTH+, the receiver output, R, turns high. When VID is less than the negative input threshold, VTH–, the receiver output, R, turns low. If VID is between VTH+ and VTH– the output is indeterminate. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted to one another (short-circuit), or the bus is not actively driven (idle bus).

Table 4. Receiver Function Table for THVD1451

VTH+ < VID H Receive valid bus high
VTH- < VID < VTH+ ? Indeterminate bus state
VID < VTH- L Receive valid bus low
Open-circuit bus H Fail-safe high output
Short-circuit bus H Fail-safe high output
Idle (terminated) bus H Fail-safe high output