When the driver enable pin, DE, is logic high, the differential outputs Y and Z follow the logic states at data input D. A logic high at D causes Y to turn high and Z to turn low. In this case the differential output voltage defined as VOD = VY – VZ is positive. When D is low, the output states reverse: Z turns high, Y becomes low, and VOD is negative.
When DE is low, both outputs turn high-impedance. In this condition the logic state at D is irrelevant. The DE pin has an internal pull-down resistor to ground, thus when left open the driver is disabled (high-impedance) by default. The D pin has an internal pull-up resistor to VCC, thus, when left open while the driver is enabled, output Y turns high and Z turns low.
|H||H||H||L||Actively drive bus high|
|L||H||L||H||Actively drive bus low|
|X||OPEN||Z||Z||Driver disabled by default|
|OPEN||H||H||L||Actively drive bus high by default|
When the receiver enable pin, RE, is logic low, the receiver is enabled. When the differential input voltage defined as VID = VA – VB is higher than the positive input threshold, VTH+, the receiver output, R, turns high. When VID is lower than the negative input threshold, VTH-, the receiver output, R, turns low. If VID is between VTH+ and VTH- the output is indeterminate.
When RE is logic high or left open, the receiver output is high-impedance and the magnitude and polarity of VID are irrelevant. Internal biasing of the receiver inputs causes the output to go failsafe-high when the transceiver is disconnected from the bus (open-circuit), the bus lines are shorted to one another (short-circuit), or the bus is not actively driven (idle bus).
|VID = VA – VB||RE||R|
|VTH+ < VID||L||H||Receive valid bus high|
|VTH- < VID < VTH+||L||?||Indeterminate bus state|
|VID < VTH-||L||L||Receive valid bus low|
|X||OPEN||Z||Receiver disabled by default|
|Open-circuit bus||L||H||Fail-safe high output|
|Short-circuit bus||L||H||Fail-safe high output|
|Idle (terminated) bus||L||H||Fail-safe high output|