The device enters UVLO if the VCC voltage falls below V(UVLO). (For the device without the integrated LDO, the device monitors VCC_IN in addition to VCC. UVLO happens if either supply falls below the threshold.)
As soon as the supply falls below V(UVLO), NFAULT is pulled low, the LDO is turned off and the OUT output is disabled (Hi-Z). Receiver performance is not specified in this mode.
When the supply rises above V(UVLO), NFAULT returns to Hi-Z (given no other fault conditions present) and the LDO will be enabled immediately. The OUT output will be turned on after T(UVLO) delay.