At TA = 25°C,
RLOAD = 10kΩ connected to VS / 2, and CL = 10pF
(unless otherwise noted)
Figure 5-1 Input
Bias Current vs Free-Air Temperature, Old Die
Figure 5-3 Maximum Peak-to-Peak Output Voltage vs Supply Voltage, Old Die
Figure 5-5 Large-Signal Differential Voltage Amplification vs Frequency, Old
Die
| TA = 25°C |
| Each color represents one sample
device. |
Figure 5-7 Offset Voltage vs Common-Mode Voltage, New Die
Figure 5-9 Closed-Loop Gain vs Frequency, New Die
Figure 5-11 Output Voltage Swing vs Output Current (Sourcing), New Die
Figure 5-13 Output Voltage Swing vs Output Current (Sourcing), New Die
Figure 5-15 Open-Loop Output Impedance vs Frequency, New Die
Figure 5-17 Small-Signal Overshoot vs Capacitive Load, New Die
| CL = 20pF, G = 1,
20mV step response |
Figure 5-19 Small-Signal Step Response, New Die
Figure 5-21 Large-Signal Step Response (Rising), New Die
Figure 5-2 Input
Bias Current vs Supply Voltage, Old Die
Figure 5-4 Maximum Peak-to-Peak Output Voltage vs Frequency, Old Die
Figure 5-6 Voltage-Follower Large-Signal Pulse Response, Old Die
Figure 5-8 Open-Loop Gain and Phase vs Frequency, New Die
Figure 5-10 Input
Bias Current vs Common-Mode Voltage, New Die
Figure 5-12 Output Voltage Swing vs Output Current (Sinking), New Die
Figure 5-14 Output Voltage Swing vs Output Current (Sinking), New Die
Figure 5-16 Small-Signal Overshoot vs Capacitive Load, New Die
Figure 5-18 Phase
Margin vs Capacitive Load, New Die
Figure 5-20 Large-Signal Step Response (Falling), New Die
Figure 5-22 Maximum Output Voltage vs Frequency, New Die