SLDS223A March   2016  – March  2016 TLC59116-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Open-Circuit Detection
      2. 9.3.2 Overtemperature Detection and Shutdown
      3. 9.3.3 Power-On Reset (POR)
      4. 9.3.4 External Reset
      5. 9.3.5 Software Reset
      6. 9.3.6 Individual Brightness Control With Group Dimming/Blinking
    4. 9.4 Device Functional Modes
      1. 9.4.1 Active
      2. 9.4.2 Standby
    5. 9.5 Programming
      1. 9.5.1 Characteristics of the I2C Bus
        1. 9.5.1.1 Bit Transfer
        2. 9.5.1.2 Start and Stop Conditions
        3. 9.5.1.3 Acknowledge
      2. 9.5.2 System Configuration
      3. 9.5.3 Device Address
      4. 9.5.4 Regular I2C Bus Slave Address
      5. 9.5.5 LED All Call I2C Bus Address
      6. 9.5.6 LED Sub Call I2C Bus Address
      7. 9.5.7 Software Reset I2C Bus Address
      8. 9.5.8 Control Register
    6. 9.6 Register Maps
      1. 9.6.1  Mode Register 1 (MODE1)
      2. 9.6.2  Mode Register 2 (MODE2)
      3. 9.6.3  Brightness Control Registers 0 to 15 (PWM0 to PWM15)
      4. 9.6.4  Group Duty Cycle Control Register (GRPPWM)
      5. 9.6.5  Group Frequency Register (GRPFREQ)
      6. 9.6.6  LED Driver Output State Registers 0 to 3 (LEDOUT0 to LEDOUT3)
      7. 9.6.7  I2C Bus Subaddress Registers 1 to 3 (SUBADR1 to SUBADR3)
      8. 9.6.8  LED All Call I2C Bus Address Register (ALLCALLADR)
      9. 9.6.9  Output Gain Control Register (IREF)
      10. 9.6.10 Error Flags Registers (EFLAG1, EFLAG2)
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Constant Current Output
      2. 10.1.2 Adjusting Output Current
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Thermal Considerations
  13. 13Device and Documentation Support
    1. 13.1 Community Resources
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Parameter Measurement Information

TLC59116-Q1 pmi_reset_lds157.gif Figure 5. Reset Timing
TLC59116-Q1 pmi_i2c_timing_lds157.gif Figure 6. Definition of Timing
TLC59116-Q1 pmi_i2cbustiming2_cls157.gif
NOTE: Rise and fall times refer to VIL and VIH.
Figure 7. I2C Bus Timing
TLC59116-Q1 pmi_test_cx_switch_lds157.gif
NOTE:
  • RL = Load resistance for SDA and SCL; should be >1 kΩ at 3-mA or lower current
  • CL = Load capacitance; includes jig and probe capacitance
  • RT = Termination resistance; should be equal to the output impedance (ZO) of the pulse generator
Figure 8. Test Circuit for Switching Characteristics