SBVS114B July   2008  – January 2015 TLC5947

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Dissipation Ratings
    6. 6.6 Electrical Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Pin Equivalent Input and Output Schematic Diagrams
    2. 7.2 Test Circuits
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Grayscale (GS) Control Function
      2. 8.3.2 Auto Display Repeat Function
      3. 8.3.3 Thermal Shutdown (TSD)
      4. 8.3.4 Noise Reduction
    4. 8.4 Programming
      1. 8.4.1 Register Configuration
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Define Basic Parameters
        2. 9.2.2.2 Grayscale (GS) Data
        3. 9.2.2.3 Auto-Display Function
        4. 9.2.2.4 Setting for the Constant Sink Current Value
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Power Dissipation
  12. 12Device and Documentation Support
    1. 12.1 Trademarks
    2. 12.2 Electrostatic Discharge Caution
    3. 12.3 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

  • Place the decoupling capacitor near the VCC pin and GND plane.
  • Place the current programming resistor RIREF close to the IREF pin and the IREFGND pin.
  • Route the GND pattern as widely as possible for large GND currents.
  • The routing wire between the LED cathode side and the device OUTXn pin must be as short and straight as possible to reduce wire inductance.
  • When several ICs are chained, symmetric placements are recommended.

11.2 Layout Example

layout.gifFigure 26. Layout Schematic

11.3 Power Dissipation

The device power dissipation must be below the power dissipation rate of the device package (illustrated in Figure 5) to ensure correct operation. Equation 4 calculates the power dissipation of the device:

Equation 4. q_pd_bvs114.gif

where

  • VCC = device supply voltage
  • ICC = device supply current
  • VOUT = OUTn voltage when driving LED current
  • IOLC = LED current adjusted by RIREF resistor
  • N = number of OUTn driving LED at the same time
  • dPWM = duty ratio defined by GS value