9 Revision History
Changes from Revision SLOS191D (November 2010) to Revision * (July 2025)
- Deleted TLE2021Y, TLE2022Y, and TLE2024Y content from this
documentGo
- Deleted PW (TSSOP), FK (LCCC), JG (CDIP) and J (CDIP) packages and
associated content throughout documentGo
- Deleted all references to Excalibur processGo
- Moved TLE202x commercial devices from SLOS191D data sheet into new
SLVSJD7 data sheetGo
- Updated the numbering format for tables, figures, and
cross-references throughout the documentGo
- Added Applications, Pin Configuration and Functions,
Specifications, Thermal Information, Application and
Implementation, Layout, Device and Documentation Support,
and Mechanical, Packaging, Orderable Information, and Revision
History sections, and associated subsections where
applicableGo
- Updated Features
Go
- Updated front page figureGo
- Updated available options tablesGo
- Deleted Equivalent Schematic (Each
Amplifier)
Go
- Updated pin names and images in Pin Configuration and
Functions
Go
- Updated parameter names and symbols in all Electrical Characteristics
Go
- Added ± to input offset voltage, input offset voltage drift, and input offset voltage long-term drift in all Electrical Characteristics
Go
- Deleted input offset voltage long term drift in all Electrical Characteristics
Go
- Moved voltage output swing (negative) values from MIN to MAX in all Electrical Characteristics
Go
- Deleted supply-current change over operating temperature range in all Electrical Characteristics
Go
- Deleted slew rate MIN in all VCC± = ±15V Electrical Characteristics
Go
- Deleted slew rate over temperature in all VCC± = ±15V Electrical Characteristics
Go
- Deleted Parameter Measurement Information
sectionGo
- Deleted Figures 27 to 29, Figures 34 to 37, Figures 47 to 49,
Figures 63 to 64, and Figures 69 to 70Go
- Updated Figures 44 to 46 (Common-Mode Rejection Ratio vs
Frequency)Go
- Deleted Parameter Measurement Information
Go
- Updated Figure 7-1, Voltage Follower
Go
- Deleted Macromodel Information
Go
- Updated Input Offset Voltage Nulling
descriptionGo
- Updated Figure 7-2, Input Offset Voltage Null
Circuit
Go
- Added Layout and associated figuresGo