SBOS751 December   2015 TLV2333 , TLV333 , TLV4333

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: TLV333
    5. 7.5 Thermal Information: TLV2333
    6. 7.6 Thermal Information: TLV4333
    7. 7.7 Electrical Characteristics: VS = 1.8 V to 5.5 V
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Operating Voltage
      2. 8.3.2 Input Voltage
      3. 8.3.3 Internal Offset Correction
      4. 8.3.4 Achieving Output Swing to the Op Amp Negative Rail
      5. 8.3.5 Input Differential Voltage
      6. 8.3.6 EMI Susceptibility and Input Filtering
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 System Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 General Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Community Resources
    5. 12.5 Trademarks
    6. 12.6 Electrostatic Discharge Caution
    7. 12.7 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage VS = (V+) – (V–) 7 V
Signal input pins(2) Voltage (V–) –0.3 (V+) + 0.3 V
Current –10 10 mA
Output short-circuit(3) Continuous
Temperature Operating –40 150 °C
Junction 150
Storage, Tstg –65 150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3 V beyond the supply rails must be current limited to 10 mA or less.
(3) Short-circuit to ground, one amplifier per package.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
VS Supply voltage 1.8 5.5 V
Specified temperature range –40 125 °C

7.4 Thermal Information: TLV333

THERMAL METRIC(1) TLV333 UNIT
D
(SOIC)		 DBV
(SOT23)		 DCK
(SC70)
8 PINS 5 PINS 5 PINS
RθJA Junction-to-ambient thermal resistance 140.1 220.8 298.4 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 89.8 97.5 65.4 °C/W
RθJB Junction-to-board thermal resistance 80.6 61.7 97.1 °C/W
ψJT Junction-to-top characterization parameter 28.7 7.6 0.8 °C/W
ψJB Junction-to-board characterization parameter 80.1 61.1 95.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

7.5 Thermal Information: TLV2333

THERMAL METRIC(1) TLV2333 UNIT
D
(SOIC)		 DGK
(VSSOP)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 124.0 180.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 73.7 48.1 °C/W
RθJB Junction-to-board thermal resistance 64.4 100.9 °C/W
ψJT Junction-to-top characterization parameter 18.0 2.4 °C/W
ψJB Junction-to-board characterization parameter 63.9 99.3 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a °C/W

7.6 Thermal Information: TLV4333

THERMAL METRIC(1) TLV4333 UNIT
D
(SOIC)		 PW
(TSSOP)
14 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 83.8 120.8 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 70.7 34.3 °C/W
RθJB Junction-to-board thermal resistance 59.5 62.8 °C/W
ψJT Junction-to-top characterization parameter 11.6 1.0 °C/W
ψJB Junction-to-board characterization parameter 37.7 56.5 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a °C/W

7.7 Electrical Characteristics: VS = 1.8 V to 5.5 V

at TA = 25°C, RL = 10 kΩ connected to mid-supply, and VCM = VOUT = mid-supply (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage(2) VS = 5 V 2 15 µV
dVOS/dT VOS vs temperature TA = –40°C to +125°C 0.02 µV/°C
PSRR VOS vs power supply VS = 1.8 V to 5.5 V 1 8 µV/V
Long-term stability(1) 1(1) µV
Channel separation, dc 0.1 µV/V
INPUT BIAS CURRENT
IB Input bias current ±70 pA
Input bias current over temperature TA = –40°C to +125°C ±150 pA
IOS Input offset current ±140 pA
NOISE
en Input voltage noise density f = 1 kHz 55 nV/√Hz
Input voltage noise f = 0.01 Hz to 1 Hz 0.3 µVPP
f = 0.1 Hz to 10 Hz 1.1
in Input current noise f = 10 Hz 100 fA/√Hz
INPUT VOLTAGE RANGE
VCM Common-mode voltage range (V–) – 0.1 (V+) + 0.1 V
CMRR Common-mode rejection ratio (V–) – 0.1 V < VCM < (V+) + 0.1 V 102 115 dB
INPUT CAPACITANCE
Differential 2 pF
Common-mode 4
OPEN-LOOP GAIN
AOL Open-loop voltage gain (V–) + 0.1 V< VO < (V+) – 0.1 V 102 130 dB
FREQUENCY RESPONSE
GBW Gain-bandwidth product CL = 100 pF 350 kHz
SR Slew rate G = 1 0.16 V/µs
OUTPUT
Voltage output swing from rail TA = –40°C to +125°C 30 70 mV
ISC Short-circuit current ±5 mA
CL Capacitive load drive See Typical Characteristics
ZO Open-loop output impedance f = 350 kHz, IO = 0 mA 2 kΩ
POWER SUPPLY
VS Specified voltage range 1.8 5.5 V
IQ Quiescent current per amplifier IO = 0 mA, TA = –40°C to +125°C 17 28 µA
Turn-on time VS = 5 V 100 µs
TEMPERATURE RANGE
Specified range –40 125 °C
Operating range –40 150 °C
Storage range –65 150 °C
(1) 300-hour life test at 150°C demonstrated randomly distributed variation of approximately 1 µV.
(2) Specified by design and characterization. Amplifiers are 100% production screened at 25°C to reduce defective units.

7.8 Typical Characteristics

at TA = 25°C, CL = 0 pF, RL = 10 kΩ connected to mid-supply, VCM = VOUT = mid-supply (unless otherwise noted)
TLV333 TLV2333 TLV4333 tc_histo_sbos751.gif
Figure 1. Offset Voltage Production Distribution
TLV333 TLV2333 TLV4333 tc_cmrr-frq_bos351.gif
Figure 3. Common-Mode Rejection Ratio vs Frequency
TLV333 TLV2333 TLV4333 tc_vos-io_sbos751.gif
Figure 5. Output Voltage Swing vs Output Current
TLV333 TLV2333 TLV4333 tc_ib-tmp_sbos751.gif
Figure 7. Input Bias Current vs Temperature
TLV333 TLV2333 TLV4333 tc_resp_lg_sbos751.gif
G = 1, RL = 10 kΩ
Figure 9. Large-Signal Step Response
TLV333 TLV2333 TLV4333 tc_pos_recov_sbos751.gif
Figure 11. Positive Overvoltage Recovery
TLV333 TLV2333 TLV4333 tc_tim-cloop_sbos751.gif
4-V step
Figure 13. Settling Time vs Closed-Loop Gain
TLV333 TLV2333 TLV4333 tc_noise_sbos751.gif
Figure 15. 0.1-Hz to 10-Hz Noise
TLV333 TLV2333 TLV4333 tc_ibc_diff_v_bos432.gif
Figure 17. Input Bias Current vs Input Differential Voltage
TLV333 TLV2333 TLV4333 tc_oloop-frq_bos351.gif
Figure 2. Open-Loop Gain vs Frequency
TLV333 TLV2333 TLV4333 tc_psrr-frq_bos351.gif
Figure 4. Power-Supply Rejection Ratio vs Frequency
TLV333 TLV2333 TLV4333 tc_ib-vcm_bos342.gif
Figure 6. Input Bias Current vs Common-Mode Voltage
TLV333 TLV2333 TLV4333 tc_iq-tmp_sbos751.gif
Figure 8. Quiescent Current vs Temperature
TLV333 TLV2333 TLV4333 tc_resp_sm_sbos751.gif
G = 1, RL = 10 kΩ
Figure 10. Small-Signal Step Response
TLV333 TLV2333 TLV4333 tc_neg_recov_sbos751.gif
Figure 12. Negative Overvoltage Recovery
TLV333 TLV2333 TLV4333 tc_ovrshoot-cl_bos351.gif
Figure 14. Small-Signal Overshoot vs Load Capacitance
TLV333 TLV2333 TLV4333 tc_noise-frq_bos351.gif
Figure 16. Current and Voltage Noise Spectral Density vs Frequency