SBOS757 May   2016 TLV2369 , TLV369

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: TLV369
    5. 6.5 Thermal Information: TLV2369
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Voltage
      2. 7.3.2 Input Common-Mode Voltage Range
      3. 7.3.3 Protecting Inputs from Overvoltage
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 Battery Monitoring
      2. 8.3.2 Window Comparator
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
        1. 11.1.1.1 Related Links
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Voltage Supply, VS = (V+) – (V–) 0 +7 V
Signal input pin(2) (V–) – 0.5 (V+) + 0.5 V
Current Signal input pin(2) –10 10 mA
Output short-circuit(3) Continuous mA
Temperature Operating, TA –40 125 °C
Junction, TJ 150 °C
Storage, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Input pins are diode-clamped to the power-supply rails. Input signals that can swing more than 0.5 V beyond the supply rails must be current limited to 10 mA or less.
(3) Short-circuit to VS / 2, one amplifier per package.

6.2 ESD Ratings

over operating free-air temperature range (unless otherwise noted).
VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±4000 V
Charged device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted).
MIN NOM MAX UNIT
VS Supply voltage 1.8 5.5 V
Specified temperature –40 85 °C

6.4 Thermal Information: TLV369

THERMAL METRIC(1) TLV369 UNIT
DCK (SC70)
5 PINS
RθJA Junction-to-ambient thermal resistance 293.3 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 95.2 °C/W
RθJB Junction-to-board thermal resistance 83.4 °C/W
ψJT Junction-to-top characterization parameter 2.9 °C/W
ψJB Junction-to-board characterization parameter 82.4 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Thermal Information: TLV2369

THERMAL METRIC(1) TLV2369 UNIT
D (SOIC) DGK (VSSOP)
8 PINS 8 PINS
RθJA Junction-to-ambient thermal resistance 121.5 168.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 66.3 58.1 °C/W
RθJB Junction-to-board thermal resistance 62.5 88.9 °C/W
ψJT Junction-to-top characterization parameter 22.8 9.3 °C/W
ψJB Junction-to-board characterization parameter 61.9 87.6 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.6 Electrical Characteristics

VS (total supply voltage) = 1.8 V to 5.5 V; at TA = 25°C, and RL = 100 kΩ connected to VS / 2 (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
VOS Input offset voltage At TA= 25°C 0.4 2 mV
At TA = –40°C to +85°C 0.85
dVOS/dT Drift At TA = –40°C to +85°C 0.5 μV/°C
PSRR Power-supply rejection ratio VS = 1.8 V to 5.5 V 80 94 dB
INPUT VOLTAGE RANGE
VCM Common-mode voltage range V– V+ V
CMRR Common-mode rejection ratio (V–) ≤ VCM ≤ (V+) 80 110 dB
INPUT BIAS CURRENT
IB Input bias current At TA= 25°C 10 pA
At TA= –40°C to +85°C See Figure 8
IOS Input offset current 10 pA
INPUT IMPEDANCE
ZID Differential 1013 || 3 Ω || pF
ZIC Common-mode 1013 || 6 Ω || pF
NOISE
En Input voltage noise f = 0.1 Hz to 10 Hz 4 μVPP
en Input voltage noise density f = 1 kHz 300 nV/√Hz
in Input current noise density f = 1 kHz 1 fA/√Hz
OPEN-LOOP GAIN
AOL Open-loop voltage gain At VS = 5.5 V, 100 mV ≤ VO ≤ (V+) – 100 mV,
RL = 100 kΩ		 130 dB
At VS = 5.5 V, 500 mV ≤ VO ≤ (V+) – 500 mV,
RL = 10 kΩ		 80 120
OUTPUT
VO Voltage output swing from rail RL = 10 kΩ 25 mV
ISC Short-circuit current 10 mA
CLOAD Capacitive load drive See Figure 10
FREQUENCY RESPONSE
GBP Gain bandwidth product 12 kHz
SR Slew rate G = 1 0.005 V/µs
tOR Overload recovery time VIN  × gain = VS 250 µs
POWER SUPPLY
VS Specified voltage range 1.8 5.5 V
IQ Quiescent current IO = 0 mA, at VS = 5.5 V 800 1300 nA
TEMPERATURE
Specified range –40 85 °C
TA Operating range –40 125 °C

6.7 Typical Characteristics

at TA = 25°C, VS = 5 V, and RL = 100 kΩ connected to VS / 2 (unless otherwise noted)
TLV369 TLV2369 tc_normal-cmvltg_bos757.gif
10 typical units shown, VS = 5 V
Figure 1. Normalized Offset Voltage vs
Common-Mode Voltage
TLV369 TLV2369 tc_open-loop_gain_phase_bos757.gif
VS = 5.5 V
Figure 3. Open-Loop Gain and Phase vs Frequency
TLV369 TLV2369 tc_cm_rej_ratio-freq_bos757.gif
Figure 5. Common-Mode Rejection Ratio vs Frequency
TLV369 TLV2369 tc_max_out_vltg-freq_bos757.gif
Figure 7. Maximum Output Voltage vs Frequency
TLV369 TLV2369 tpc_open-loop-freq_bos757.gif
Figure 9. Open-Loop Output Impedance vs Frequency
TLV369 TLV2369 tc_scope_resp_sm20_bos757.gif
CL = 20 pF
Figure 11. Small-Signal Step Response
TLV369 TLV2369 tc_overload_scope_bos757.gif
Figure 13. Overload Recovery
TLV369 TLV2369 tc_scope_noise_bos757.gif
Figure 2. 0.1-Hz to 10-Hz Noise
TLV369 TLV2369 tc_open_loop_gain_temp_bos757.gif
Figure 4. Open-Loop Gain vs Temperature
TLV369 TLV2369 tc_output_vltg_swing-tmp_bos757.gif
Figure 6. Output Voltage Swing from Rail vs Temperature
TLV369 TLV2369 tc_inputbc-tmp_bos757.gif
Figure 8. Input Bias Current vs Temperature
TLV369 TLV2369 tc_ss_overshoot_bos757.gif
Figure 10. Small-Signal Overshoot vs Capacitive Load
TLV369 TLV2369 tc_scope_resp_lrg_bos757.gif
Figure 12. Large-Signal Step Response