SGLS154F November   2000  – September 2025 TLV3701-Q1 , TLV3702-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
    1.     Pin Configuration: TLV3701
    2.     Pin Configurations: TLV3702
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Dissipation Rating Table
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Electrical Characteristics
    5. 6.5 Switching Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagrams
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Inputs
        1. 7.4.1.1 Operating Common-Mode Ranges
        2. 7.4.1.2 Fail-Safe Inputs
        3. 7.4.1.3 Unused Inputs
      2. 7.4.2 Internal Hysteresis
      3. 7.4.3 Outputs
        1. 7.4.3.1 Push-Pull Output
      4. 7.4.4 ESD Protection
        1. 7.4.4.1 Inputs
        2. 7.4.4.2 Outputs
      5. 7.4.5 Power-On Reset (POR)
      6. 7.4.6 Reverse Battery Protection
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Electrostatic Discharge Caution
    4. 8.4 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.4 Electrical Characteristics

at specified operating free-air temperature, V+ = 2.7V, 5V, 15V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA(1) MIN TYP MAX UNIT
DC Performance
VIO Input offset voltage VIC = (V+)/2,RS = 50Ω 25°C 250 5000 µV
Full range 7000
αVIO Offset voltage drift VIC = (V+)/2,RS = 50Ω 25°C 3 µV/°C
VHYS Input hysteresis voltage VIC = (V+)/2,RS = 50Ω 25°C 1 2.8 5 mV
CMRR Common mode rejection ratio VIC = 0 to 2.7V RS = 50Ω 25°C 72 dB
VIC = 0 to 5V RS = 50Ω 25°C 76
VIC = 0 to 15V RS = 50Ω 25°C 88
AVD Large-signal differential voltage amplification 25°C 1000 V/mV
Input/Output Characteristics
IIO Input offset current VIC = (V+)/2, RS = 50Ω 25°C 20 100 pA
Full range 1000
IIB Input bias current 25°C 80 250 pA
Full range 2000
ri(d) Differential input resistance 25°C 300 MΩ
VOH High-level output voltage VIC =(V+)/2, IOH = 2µA, VID = 1V 25°C (V+) – 0.08 mV
VIC = (V+)/2, IOH = −50μA, VID = 1V 25°C (V+) – 320
Full range (V+) – 450
VOL Low-level output voltage VIC = (V+)/2, IOH = 2µA, VID –1V 25°C 8 mV
VIC = (V+)/2, IOH = 50μA, VID –1V 25°C 80 200
Full range 300
Power Supply
I+ Supply current (per channel) Output state high 25°C 560 800 nA
Full range 1200
PSRR Power supply rejection ratio VIC = (V+)/2,
No load		 (V+) = 2.7V to 5V 25°C 75 100 dB
Full range 70
(V+) = 5V to 15V 25°C 85 105
Full range 80
(1) Full range is –40°C to 125°C for Q suffix.