SNOSD26 May   2016 TLV521

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 AC Electrical Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
      1. 7.4.1 Input Stage
      2. 7.4.2 Output Stage
  8. 8 Applications and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Driving Capacitive Load
      2. 8.1.2 EMI Suppression
    2. 8.2 Typical Applications
      1. 8.2.1 60-Hz Twin T-Notch Filter
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 Portable Gas Detection Sensor
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curve
      3. 8.2.3 High-Side Battery Current Sensing
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curve
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings(1)

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Any pin relative to V– −0.3 6 V
IN+, IN–, OUT Pins V– – 0.3 V V+ + 0.3 V V
V+, V–, OUT Pins 40 mA
Differential Input Voltage (VIN+ - VIN–) –300 300 mV
Junction Temperature –40 150 °C
Mounting Temperature Infrared or Convection (30 sec.) 260 °C
Wave Soldering Lead Temp. (4 sec.) 260 °C
Storage temperature, Tstg −65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000
Machine Model ±200
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions(1)

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
Temperature Range −40 125 °C
Supply Voltage (VS = V+ - V−) 1.7 5.5 V
(1) indicate limits beyond which damage may occur. indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and test conditions, see Electrical Characteristics.

6.4 Thermal Information

THERMAL METRIC(1) TLV521 UNIT
DCK (SC70)
5 PINS
RθJA Junction-to-ambient thermal resistance 269.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 93.7 °C/W
RθJB Junction-to-board thermal resistance 48.8 °C/W
ψJT Junction-to-top characterization parameter 2 °C/W
ψJB Junction-to-board characterization parameter 47.9 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

Unless otherwise specified, all limits for TA = 25°C, V+ = 3.3 V, V− = 0 V, VCM = VO = V+/2, and RL > 1 MΩ.(1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VOS Input Offset Voltage VCM = 0.3 V –3 0.1 3 mV
VCM = 3 V –3 0.1 3
TCVOS Input Offset Voltage Drift ±1.5 μV/°C
IBIAS Input Bias Current 1 pA
IOS Input Offset Current 50 fA
CMRR Common Mode Rejection Ratio 0 V ≤ VCM ≤ 3.3 V 70 90 dB
0 V ≤ VCM ≤ 2.2 V 100
PSRR Power Supply Rejection Ratio V+ = 1.8 V to 3.3 V; VCM = 0.3 V 80 100 dB
CMVR Common Mode Voltage Range CMRR ≥ 70 dB 0 3.3 V
AVOL Large Signal Voltage Gain VO = 0.5 V to 2.8 V
RL = 100 kΩ to V+/2 		80 110 dB
VO Output Swing High RL = 100 kΩ to V+/2
VIN(diff) = 100 mV 		3 50 mV from either rail
Output Swing Low RL = 100 kΩ to V+/2
VIN (diff) = −100 mV 		2 50
IO Output Current Sourcing, VO to V−
VIN(diff) = 100 mV 		11 mA
Sinking, VO to V+
VIN(diff) = −100 mV 		12
IS Supply Current VCM = 0.3 V 350 500 nA
(1) Electrical Characteristics values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. Parametric performance, as indicated in the electrical tables, is not ensured under conditions of self heating where TJ > TA. indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically.

6.6 AC Electrical Characteristics(1)

Unless otherwise specified, all limits for TA = 25°C, V+ = 3.3 V, V− = 0 V, VCM = VO = V+/2, and RL > 1 MΩ.
PARAMETER TEST CONDITIONS MIN
(2)		 TYP
(3)		 MAX
(2)		 UNIT
GBW Gain-Bandwidth Product CL = 20 pF, RL = 100 kΩ 6 kHz
SR Slew Rate AV = +1,
VIN = 0 V to 3.3 V		 Falling Edge 2.9 V/ms
Rising Edge 2.5
θ m Phase Margin CL = 20 pF, RL = 100 kΩ 73 deg
Gm Gain Margin CL = 20 pF, RL = 100 kΩ 19 dB
en Input-Referred Voltage Noise Density f = 100 Hz 300 nV/√Hz
Input-Referred Voltage Noise 0.1 Hz to 10 Hz 22 μVPP
In Input-Referred Current Noise f = 100 Hz 100 fA/√Hz
EMIRR EMI Rejection Ratio, IN+ and IN−(4) VRF_PEAK = 100 mVP (−20 dBP),
f = 400 MHz		 121 dB
VRF_PEAK = 100 mVP (−20 dBP),
f = 900 MHz		 121
VRF_PEAK = 100 mVP (−20 dBP),
f = 1800 MHz		 124
VRF_PEAK = 100 mVP (−20 dBP),
f = 2400 MHz		 142
(1) Electrical Characteristics values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. Parametric performance, as indicated in the electrical tables, is not ensured under conditions of self heating where TJ > TA. indicate junction temperature limits beyond which the device may be permanently degraded, either mechanically or electrically.
(2) All limits are ensured by testing, statistical analysis or design.
(3) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material.
(4) The EMI Rejection Ratio is defined as EMIRR = 20log (VRF_PEAK/ΔVOS).

6.7 Typical Characteristics

At TJ = 25°C, unless otherwise specified.
TLV521 30054504.gif Figure 1. Supply Current vs. Supply Voltage
TLV521 30054575.gif Figure 3. Offset Voltage Distribution
TLV521 30054537.gif Figure 5. Input Offset Voltage vs. Supply Voltage
TLV521 30054540.gif Figure 7. Input Offset Voltage vs. Output Voltage
TLV521 30054546.gif Figure 9. Input Offset Voltage vs. Sinking Current
TLV521 30054511.gif Figure 11. Sinking Current vs. Output Voltage
TLV521 30054549.gif Figure 13. Sinking Current vs. Supply Voltage
TLV521 30054551.gif Figure 15. Output Swing Low vs. Supply Voltage
TLV521 30054564.gif Figure 17. Input Bias Current vs. Common Mode Voltage
TLV521 30054560.gif Figure 19. CMRR vs. Frequency
TLV521 30054521.gif Figure 21. Frequency Response vs. RL
TLV521 30054536.gif Figure 23. Slew Rate vs. Supply Voltage
TLV521 30054532.gif Figure 25. Large Signal Pulse Response
TLV521 30054534.gif
Figure 27. Overload Recovery Waveform
TLV521 30054535.gif Figure 2. Supply Current vs. Supply Voltage
TLV521 30054505_new.gif Figure 4. Input Offset Voltage vs. Input Common Mode
TLV521 30054538.gif Figure 6. Input Offset Voltage vs. Supply Voltage
TLV521 30054543.gif Figure 8. Input Offset Voltage vs. Sourcing Current
TLV521 30054510.gif Figure 10. Sourcing Current vs. Output Voltage
TLV521 30054548.gif Figure 12. Sourcing Current vs. Supply Voltage
TLV521 30054550.gif Figure 14. Output Swing High vs. Supply Voltage
TLV521 30054516.gif Figure 16. Input Bias Current vs. Common Mode Voltage
TLV521 30054527.gif Figure 18. PSRR vs. Frequency
TLV521 30054524.gif Figure 20. Frequency Response vs. Temperature
TLV521 30054518.gif Figure 22. Frequency Response vs. CL
TLV521 30054562.gif Figure 24. 0.1 to 10 Hz Time Domain Voltage Noise
TLV521 30054533.gif Figure 26. Large Signal Pulse Response
TLV521 30054572.gif Figure 28. EMIRR vs. Frequency