SBVS195F September 2012 – August 2019 TLV713
The ability to remove heat from the die is different for each package type, presenting different considerations in the printed-circuit-board (PCB) layout. The PCB area around the device that is free of other components moves the heat from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in Thermal Information. Using heavier copper increases the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers also improves the heatsink effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation (PD) can be approximated by the product of the output current times the voltage drop across the output pass element (VIN to VOUT), as shown in Equation 3.
Figure 30 shows the maximum ambient temperature versus the power dissipation of the TLV713. This figure assumes the device is soldered on a JEDEC standard, high-K layout with no airflow over the board. Actual board thermal impedances vary widely. If the application requires high power dissipation, having a thorough understanding of the board temperature and thermal impedances is helpful to ensure the TLV713 does not operate above a junction temperature of 125°C.
Estimating the junction temperature can be done by using the thermal metrics ΨJT and ΨJB, shown in the Thermal Information table. These metrics are a more accurate representation of the heat transfer characteristics of the die and the package than RθJA. The junction temperature can be estimated with Equation 4.
Both TT and TB can be measured on actual application boards using a thermo‐gun (an infrared thermometer).