SCBS881E January   2010  – October 2018 TMS3705

PRODUCTION DATA.  

  1. 1Device Overview
    1. 1.1 Features
    2. 1.2 Applications
    3. 1.3 Description
    4. 1.4 Functional Block Diagram
  2. 2Revision History
  3. 3Device Characteristics
    1. 3.1 Related Products
  4. 4Terminal Configuration and Functions
    1. 4.1 Pin Diagram
    2. 4.2 Signal Descriptions
      1. Table 4-1 Signal Descriptions
  5. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Electrical Characteristics
    5. 5.5 Thermal Resistance Characteristics for D (SOIC) Package
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Diagrams
  6. 6Detailed Description
    1. 6.1  Power Supply
    2. 6.2  Oscillator
    3. 6.3  Predrivers
    4. 6.4  Full Bridge
    5. 6.5  RF Amplifier
    6. 6.6  Band-Pass Filter and Limiter
    7. 6.7  Diagnosis
    8. 6.8  Power-on Reset
    9. 6.9  Frequency Divider
    10. 6.10 Digital Demodulator
    11. 6.11 Transponder Resonance-Frequency Measurement
    12. 6.12 SCI Encoder
    13. 6.13 Control Logic
    14. 6.14 Test Pins
  7. 7Applications, Implementation, and Layout
    1. 7.1 Application Diagram
  8. 8Device and Documentation Support
    1. 8.1 Getting Started and Next Steps
    2. 8.2 Device Nomenclature
    3. 8.3 Tools and Software
    4. 8.4 Documentation Support
    5. 8.5 Community Resources
    6. 8.6 Trademarks
    7. 8.7 Electrostatic Discharge Caution
    8. 8.8 Export Control Notice
    9. 8.9 Glossary
  9. 9Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Predrivers

The predrivers generate the signals for the four power transistors of the full bridge using the carrier frequency generated by the frequency divider. The gate signals of the P-channel power transistors (active low) have the same width (±1 cycle of the 16 MHz clock), the delay between one P-channel MOSFET being switched off and the other one being switched on is defined to be 12 cycles of the 16-MHz clock. In write mode the first activation of a gate signal after a bit pause is synchronized to the received transponder signal by a phase shift of 18°.