SPNS230D October 2013 – February 2015 TMS570LS3137-EP
To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all devices. Each commercial family member has one of three prefixes: TMX, TMP, or TMS (for example, TMS570LS3137). These prefixes represent evolutionary stages of product development from engineering prototypes (TMX) through fully qualified production devices/tools (TMS).
Device development evolutionary flow:
TMX and TMP devices are shipped against the following disclaimer:
"Developmental product is intended for internal evaluation purposes."
TMS devices have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies.
Predictions show that prototype devices (TMX or TMP) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used.
The following documents describe the TMS570LS3137-EP microcontroller.
|SPNU499||TMS570LS31x/21x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual details the integration, the environment, the functional description, and the programming models for each peripheral and subsytem in the device.|
|SPNZ195||TMS570LS31x/21x Microcontroller Silicon Errata (Silicon Revision C) describes the known exceptions to the functional specifications for the device silicon revision(s).|
E2E is a trademark of Texas Instruments.
Cortex is a trademark of ARM Limited.
ARM is a registered trademark of ARM Limited.
All other trademarks are the property of their respective owners.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
The device identification code register identifies several aspects of the device including the silicon version. The details of the device identification code register are shown in Table 8-1. The device identification code register value for this device is:
|TECH||I/O VOLTAGE||PERIPH PARITY||FLASH ECC||RAM ECC|
|LEGEND: R/W = Read/Write; R = Read only; -n = value after reset|
|31||CP15||Indicates the presence of coprocessor 15|
Silicon version (revision) bits.
This bitfield holds a unique number for a dedicated device configuration (die).
|16-13||TECH||Process technology on which the device is manufactured.|
|12||I/O VOLTAGE||I/O voltage of the device.|
|0||I/O are 3.3v|
|11||PERIPHERAL PARITY||Peripheral Parity|
|1||Parity on peripheral memories|
|10-9||FLASH ECC||Flash ECC|
|10||Program memory with ECC|
|8||RAM ECC||Indicates if RAM memory ECC is present.|
|7-3||REVISION||Revision of the Device.|
|2-0||101||The platform family ID is always 0b101|
The four die ID registers at addresses 0xFFFFE1F0, 0xFFFFE1F4, 0xFFFFE1F8 and FFFFE1FC form a 128-bit dieid with the information as shown in Table 8-2.
|Item||Number of Bits||Bit Location|
|X-coordinate on wafer||12||0xFFFFE1F0[11:0]|
|Y-coordinate on wafer||12||0xFFFFE1F0[23:12]|
|Reserved||72||0xFFFFE1F4[31:24], 0xFFFFE1F8[31:0], 0xFFFFE1FC[31:0]|
The following communications modules have received certification of adherence to a standard.