SCDS382C April   2018  – August 2019 TMUX1072

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Simplified Schematic
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Dynamic Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Powered-off Protection
      2. 8.3.2 Overvoltage Detection
      3. 8.3.3 Overtemperature Detection
      4. 8.3.4 Overvoltage Protection
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pin Functions
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

TA = –40°C to +125°C , VCC = 2.3 V to 5.5 V, GND = 0V, Typical values are at VCC = 3.3 V, TA = 25°C, (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY
VCC Power supply voltage 2.3 5.5 V
ICC Active supply current OE = 0 V
SEL1, SEL2 = 0 V, 1.8 V or VCC
0 V < VI/O < 3.6 V
75 110 µA
Supply current during OVP condition OE = 0 V
SEL1, SEL2 = 0 V, 1.8 V or VCC
VI/O > VPOS_THLD
65 98 µA
ICC_PD(2) Standby powered down supply current OE = 1.8 V or VCC
SEL1 = 0 V, 1.8 V, or VCC
SEL2 = 0 V, 1.8 V, or VCC
3 10 µA
UVLO Under Voltage Lock Out VCC = rising and falling 1.65 V
DC Characteristics
RON ON-state resistance VI/O = 0 V to VCC
ISINK = 8 mA
Refer to ON-State Resistance Figure
6 18
ΔRON ON-state resistance match between channels VI/O = 0 V to VCC
ISINK = 8 mA
Refer to ON-State Resistance Figure
0.07 0.5
RON (FLAT)  ON-state resistance flatness VI/O = 0 V to VCC
ISINK = 8 mA
Refer to ON-State Resistance Figure
2.5 7
IOFF I/O pin OFF leakage current VCOM1/2 = 0 V to 5.5 V (3)
VCC = 2.3 V to 5.5 V
VNC1/2 or VNO1/2 = 5.5 V or 0 V
Refer to Off Leakage Figure
3.6 10 µA
VCOM1/2 = 5.5 V (3)
VCC = 5.5 V
VNC1/2 or VNO1/2 = 5.5 V
Refer to Off Leakage Figure
3 µA
VCOM1/2 = 3.6 V (3)
VCC = 3.3 V
VNC1/2 or VNO1/2 = 3.6 V
Refer to Off Leakage Figure
2 µA
VCOM1/2 = 5.5 V
VCC = 0 V
VNC1/2 or VNO1/2 = 5.5 V
Refer to Off Leakage Figure
15 µA
VCOM1/2 = 3.6 V
VCC = 0 V
VNC1/2 or VNO1/2 = 3.6 V
Refer to Off Leakage Figure
10 uA
VCOM1/2 = 1 V
VCC = 0 V
VNC1/2 or VNO1/2 = 1 V
Refer to Off Leakage Figure
2 uA
VCOM1/2 = 18 V
VCC = 0 V, 5.5 V
VNC1/2 or VNO1/2 = 0 V
Refer to Off Leakage Figure
165 185 µA
ION ON leakage current VCOM1/2 = 5.5 V

VCC = 5.5 V

VNC1/2 and VNO1/2 = high-Z
Refer to On Leakage Figure
1.2 3.5 µA
VCOM1/2 = 0 V to 5.5 V

VCC = 2.3-5.5 V


VNC1/2 and VNO1/2 = high-Z
Refer to On Leakage Figure
11.5 µA
Digital Characteristics
VIH Input logic high SEL1, SEL2, OE 1.45 V
VIL Input logic low SEL1, SEL2, OE 0.5 V
VOL Output logic low FLT
IOL = 3 mA
0.3 V
IIH Input high leakage current SEL1, SEL2, OE = 1.8 V, VCC -1 2 5 μA
IIL Input low leakage current SEL1, SEL2, OE = 0 V -1 ±0.2 1 μA
RPD Internal pull-down resistor on digital input pins SEL1, SEL2 6 12
OE 3 6
CI(1) Digital input capacitance SEL1, SEL2 = 0 V, 1.8 V or VCC
f = 1 MHz
8 pF
Protection and Detection
VOVP_TH OVP positive threshold 5.55 5.8 6.0 V
VOVP_HYST(1) OVP threshold hysteresis 40 100 300 mV
TSD_HYST(1) Thermal Shutdown Hysteresis 3 8 °C
TOTD_TH(1) Overtemperature detection threshold 135 165 °C
VCLAMP_V(1) Maximum voltage to appear on NC1/2 and NO1/2 pins during OVP scenario VCOM1/2 = 0 to 18 V
tRISE and tFALL(10% to 90 %) = 100 ns
RL = Open
Switch on or off
OE = 0 V
0 9.6 V
VCOM1/2 = 0 to 18 V
tRISE and tFALL(10% to 90 %) = 100 ns
RL = 50Ω
Switch on or off
OE = 0 V
0 9.0 V
tEN_OVP(1) OVP enable time RPU = 10 kΩ to VCC (FLT)
CL = 35 pF
Refer to OVP Timing Diagram Figure
0.6 3 μs
tREC_OVP(1) OVP recovery time RPU = 10 kΩ to VCC (FLT)
CL = 35 pF
Refer to OVP Timing Diagram Figure
1.5 5 μs
Specified by design, not tested in production.
Not tested for DGS package due to absence of FLT and OE pin.
Not tested on COM1/2 pins for DGS package due to the absence of OE pin