SCDS399 August   2019 TMUX1247

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Application Example
      2.      TMUX1247 Block Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics (VDD = 5 V ±10 %), GND = 0 V unless otherwise specified.
    6. 6.6 Electrical Characteristics (VDD = 3.3 V ±10 %), GND = 0 V unless otherwise specified.
    7. 6.7 Electrical Characteristics (VDD = 1.8 V ±10 %), GND = 0 V unless otherwise specified.
    8. 6.8 Electrical Characteristics (VDD = 1.2 V ±10 %), GND = 0 V unless otherwise specified.
    9. 6.9 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1 On-Resistance
    2. 7.2 Off-Leakage Current
    3. 7.3 On-Leakage Current
    4. 7.4 Transition Time
    5. 7.5 Break-Before-Make
    6. 7.6 Charge Injection
    7. 7.7 Off Isolation
    8. 7.8 Crosstalk
    9. 7.9 Bandwidth
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Rail to Rail Operation
      3. 8.3.3 1.8 V Logic Compatible Inputs
      4. 8.3.4 Fail-Safe Logic
    4. 8.4 Device Functional Modes
    5. 8.5 Truth Tables
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Input Control for Power Amplifier
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Switchable Operational Amplifier Gain Setting
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
        3. 9.2.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Layout Information
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Layout Information

When a PCB trace turns a corner at a 90° angle, a reflection can occur. A reflection occurs primarily because of the change of width of the trace. At the apex of the turn, the trace width increases to 1.414 times the width. This increase upsets the transmission-line characteristics, especially the distributed capacitance and self–inductance of the trace which results in the reflection. Not all PCB traces can be straight and therefore some traces must turn corners. Figure 21 shows progressively better techniques of rounding corners. Only the last example (BEST) maintains constant trace width and minimizes reflections.

TMUX1247 layout_scds357.gifFigure 21. Trace Example

Route high-speed signals using a minimum of vias and corners which reduces signal reflections and impedance changes. When a via must be used, increase the clearance size around it to minimize its capacitance. Each via introduces discontinuities in the signal’s transmission line and increases the chance of picking up interference from the other layers of the board. Be careful when designing test points, through-hole pins are not recommended at high frequencies.

Figure 22 illustrates an example of a PCB layout with the TMUX1247. Some key considerations are:

  • Decouple the VDD pin with a 0.1-µF capacitor, placed as close to the pin as possible. Make sure that the capacitor voltage rating is sufficient for the VDD supply.
  • Keep the input lines as short as possible.
  • Use a solid ground plane to help reduce electromagnetic interference (EMI) noise pickup.
  • Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when necessary.