SBOS555G June 2011 – May 2024 TPA6211A1-Q1
PRODUCTION DATA
- 1
- 1 Features
- 2 Applications
- 3 Description
- 4 Pin Configuration and Functions
- 5 Specifications
- 6 Detailed Description
-
7 Application and Implementation
- 7.1 Application Information
- 7.2
Typical Applications
- 7.2.1
Typical Differential Input Application
- 7.2.1.1 Design Requirements
- 7.2.1.2 Detailed Design Procedure
- 7.2.1.3 Application Curves
- 7.2.2 Other Application Circuits
- 7.2.1
Typical Differential Input Application
- 7.3 Power Supply Recommendations
- 7.4 Layout
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
- DGN|8
Thermal pad, mechanical data (Package|Pins)
- DGN|8
Orderable Information
Abstract
Table 5-1 Table of Graphs
| FIGURE | ||
|---|---|---|
| Output power | vs Supply voltage | Figure 5-1 |
| vs Load resistance | Figure 5-2 | |
| Power dissipation | vs Output power | Figure 5-3, Figure 5-4 |
| Total harmonic distortion + noise | vs Output power | Figure 5-5, Figure 5-6, Figure 5-7 |
| vs Frequency | Figure 5-8, Figure 5-9, Figure 5-10, Figure 5-11, Figure 5-12 | |
| vs Common-mode input voltage | Figure 5-13 | |
| Supply voltage rejection ratio | vs Frequency | Figure 5-14, Figure 5-15, Figure 5-16, Figure 5-17 |
| Supply voltage rejection ratio | vs Common-mode input voltage | Figure 5-18 |
| GSM Power supply rejection | vs Time | Figure 5-19 |
| GSM Power supply rejection | vs Frequency | Figure 5-20 |
| Common-mode rejection ratio | vs Frequency | Figure 5-21 |
| vs Common-mode input voltage | Figure 5-22 | |
| Closed loop gain/phase | vs Frequency | Figure 5-23 |
| Open loop gain/phase | vs Frequency | Figure 5-24 |
| Supply current | vs Supply voltage | Figure 5-25 |
| vs Shutdown voltage | Figure 5-26 | |
| Start-up time | vs Bypass capacitor | Figure 5-27 |
Figure 5-1 Output Power vs Supply Voltage
Figure 5-3 Power Dissipation vs Output Power
Figure 5-5 Total Harmonic Distortion + Noise vs Output Power
Figure 5-7 Total Harmonic Distortion + Noise vs Output Power
Figure 5-9 Total Harmonic Distortion + Noise vs Frequency
Figure 5-11 Total Harmonic Distortion + Noise vs Frequency
Figure 5-13 Total Harmonic Distortion + Noise vs Common-Mode Input Voltage
Figure 5-15 Supply Voltage Rejection Ratio vs Frequency
Figure 5-17 Supply Voltage Rejection Ratio vs Frequency
Figure 5-19 GSM Power Supply Rejection vs Time
Figure 5-21 Common-Mode Rejection Ratio vs Frequency
Figure 5-23 Closed Loop Gain/Phase vs Frequency
Figure 5-25 Supply Current vs Supply Voltage
Figure 5-27 Start-up Time vs Bypass Capacitor
Figure 5-2 Output Power vs Load Resistance
Figure 5-4 Power Dissipation vs Output Power
Figure 5-6 Total Harmonic Distortion + Noise vs Output Power
Figure 5-8 Total Harmonic Distortion + Noise vs Frequency
Figure 5-10 Total Harmonic Distortion + Noise vs Frequency
Figure 5-12 Total Harmonic Distortion + Noise vs Frequency
Figure 5-14 Supply Voltage Rejection Ratio vs Frequency
Figure 5-16 Supply Ripple Rejection Ratio vs Frequency
Figure 5-18 Supply Voltage Rejection Ratio vs DC Common-Mode Input
Figure 5-20 GSM Power Supply Rejection vs Frequency
Figure 5-22 Common-Mode Rejection Ratio vs Common-Mode Input Voltage
Figure 5-24 Open Loop Gain/Phase vs Frequency
Figure 5-26 Supply Current vs Shutdown Voltage