SLUSEQ9D July   2022  – April 2024 TPS1211-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Charge Pump and Gate Driver Output (VS, PU, PD, BST, SRC)
      2. 8.3.2 Capacitive Load Driving
        1. 8.3.2.1 FET Gate Slew Rate Control
        2. 8.3.2.2 Using Precharge FET - (with TPS12111-Q1 Only)
      3. 8.3.3 Overcurrent and Short-Circuit Protection
        1. 8.3.3.1 Overcurrent Protection with Auto-Retry
        2. 8.3.3.2 Overcurrent Protection with Latch-Off
        3. 8.3.3.3 Short-Circuit Protection
      4. 8.3.4 Analog Current Monitor Output (IMON)
      5. 8.3.5 Overvoltage (OV) and Undervoltage Protection (UVLO)
      6. 8.3.6 Remote Temperature Sensing and Protection (DIODE)
      7. 8.3.7 Output Reverse Polarity Protection
      8. 8.3.8 TPS1211x-Q1 as a Simple Gate Driver
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Driving Zonal Controller Loads on 12-V Line in Power Distribution Unit
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application: Reverse Polarity Protection with TPS12110-Q1
      1. 9.3.1 Design Requirements
      2. 9.3.2 External Component Selection
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

The TPS1211-Q1 family is a 45V, smart high-side driver with protection and diagnostics. With wide operating voltage range of 3.5V–40V, the device is suitable for 12V system designs.

The device has a strong 3.7A peak source (PU) and 4A peak sink (PD) gate driver that enables power switching using parallel FETs in high-current system designs. Use INP as the gate driver control input.

The device has accurate current sensing (±2% at 30mV) output (IMON) enabling system designs for energy management. The device has integrated two-level overcurrent protection with FLT_I output with complete adjustability of thresholds and response time. Auto-retry and latch-off fault behavior can be configured. The device features remote overtemperature protection with FLT_T output.

The TPS12111-Q1 integrates a pre-charge driver (G) with control input (INP_G). This features enables designs that must drive large capacitive loads. In shutdown mode (EN/UVLO < 0.3V), the controller draws a total shutdown current of 0.9µA (typical).

The TPS1211-Q1 is available in a 19-pin VSSOP package with a pin removed between adjacent high voltage and low voltage pins, providing 0.8mm clearance.

Package Information
PART NUMBERPACKAGE(1)PACKAGE SIZE(2)
TPS12110-Q1,
TPS12111-Q1,
TPS12112-Q1		DGX (VSSOP, 19)5.10mm × 3.00mm
(1) For all available packages, see Section 12.
(2) The package size (length × width) is a nominal value and includes pins, where applicable.
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