SLVSBH4F June   2012  – July 2016 TPS22966

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics—VBIAS = 5 V
    6. 6.6 Electrical Characteristics—VBIAS = 2.5 V
    7. 6.7 Switching Characteristics
    8. 6.8 Typical DC Characteristics
    9. 6.9 Typical AC Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 ON and OFF Control
      2. 8.3.2 Input Capacitor (Optional)
      3. 8.3.3 Output Capacitor (Optional)
      4. 8.3.4 VIN and VBIAS Voltage Range
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Adjustable Rise Time
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Considerations
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

11 Layout

11.1 Layout Guidelines

For best performance, all traces must be as short as possible. To be most effective, the input and output capacitors must be placed close to the device to minimize the effects that parasitic trace inductances may have on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects along with minimizing the case to ambient thermal impedance.

11.2 Layout Example

Notice the thermal vias located under the exposed thermal pad of the device. This allows for thermal diffusion away from the device.

TPS22966 layout_lvsbh4.gif Figure 36. PCB Layout Example

11.3 Thermal Considerations

The maximum IC junction temperature must be restricted to 125°C under normal operating conditions. To calculate the maximum allowable power dissipation, PD(max) for a given output current and ambient temperature, use Equation 5:

Equation 5. TPS22966 eq2_lvsbh4.gif

where

  • PD(max) is the maximum allowable power dissipation
  • TJ(max) is the maximum allowable junction temperature (125°C for the TPS22966)
  • TA is the ambient temperature of the device
  • θJA is the junction to air thermal impedance. See the Thermal Information section. This parameter is highly dependent upon board layout.