SLVSCI7C March 2014 – March 2021 TPS3700-Q1
PRODUCTION DATA
At TJ = 25°C and VDD = 5 V, unless otherwise noted.
Figure 6-2 Supply Current (IDD) vs Supply Voltage (VDD)
Figure 6-4 Hysteresis (Vhys) vs Temperature
Figure 6-6 Propagation Delay vs Temperature (Low-to-High Transition at the Inputs)
Figure 6-8 Supply Current (IDD) vs Output Sink Current
Figure 6-10 Output Voltage Low (VOL) vs Output Sink Current (0°C)
Figure 6-12 Output Voltage Low (VOL) vs Output Sink Current (85°C)
Figure 6-3 Rising Input Threshold Voltage (VIT+) vs Temperature
Figure 6-5 Propagation Delay vs Temperature (High-to-Low Transition at the Inputs)
| INA+ = negative spike below VIT– | ||
| INB– = positive spike above VIT+ |
Figure 6-9 Output Voltage Low (VOL) vs Output Sink Current (–40°C)
Figure 6-11 Output Voltage Low (VOL) vs Output Sink Current (25°C)
Figure 6-13 Output Voltage Low (VOL) vs Output Sink Current (125°C)