SBVS231A August   2014  – March 2015 TPS3847

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Ultralow Supply Current
      2. 7.3.2 Wide Supply Range
      3. 7.3.3 High-Accuracy Negative Threshold
      4. 7.3.4 Push-Pull Output
      5. 7.3.5 Manual Reset (MR) Input
      6. 7.3.6 VCC Transient Rejection
      7. 7.3.7 Controlled Startup Current
      8. 7.3.8 Low Minimum Supply Voltage for Valid Output
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Input Capacitor
        2. 8.2.1.2 Driving Bidirectional Reset Pins
        3. 8.2.1.3 Manual Reset (MR) Input
        4. 8.2.1.4 Threshold Overdrive
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Do's and Don'ts
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Device Nomenclature
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

DBV Package
5-Pin SOT
(Top View)
TPS3847 po_dbv_bvs231.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
GND 2 — Ground
MR 4 I Manual reset. Pull this pin to a logic low to force the RESET output low regardless of the voltage on VCC. After the MR pin is pulled to a logic high, the RESET output goes high after the RESET delay time (td) if the voltage on VCC is higher than the positive-going threshold voltage.
NC 3 — No internal connection.
RESET 1 O Active low reset output. RESET stays low as long as the voltage on VCC is below the factory trimmed threshold voltage. RESET transitions from low to high once the VCC voltage is above the positive-going threshold voltage for a specified time (td). RESET is a push-pull output.
VCC 5 I Power supply and monitored voltage. TI recommends adding a small 0.1-μF bypass capacitor near the VCC pin.