SLUS930D April 2011 – November 2016 TPS40400
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The TPS40400 device is a step-down DC-DC controller with integrated MOSFET drivers. Input voltage, output voltage and output current telemetry, parametric configuration, and protection features are programmable via the PMBus interface. The device is typically paired with two power MOSFETs and an L-C filter output stage to convert a higher DC voltage to a lower DC voltage. The available output current of a converter using the TPS40400 controller is limited by the choice of power stage components, and over-current protection levels. The maximum allowable over-current protection threshold is 35 A. Use the following design procedure to select component values for a TPS40400 converter. A Loop Compensation Calculator tool is available at www.ti.com to calculate the control loop compensation components, required for stability. The TPS40400 is also supported by Texas Instruments Fusion Digital Power Designer, a graphical software tool set designed to simplify programming, monitoring and configuration of the TPS40400 device via the PMBus interface.
The following example shows the design process and component selection for a synchronous buck converter using the TPS40400. The design goal parameters are listed in Table 62.
PARAMETER | TEST CONDITIONS | MIN | NOM | MAX | UNIT | |
---|---|---|---|---|---|---|
INPUT CHARACTERISTICS | ||||||
V_{IN} | Input voltage | 8 | 12 | 14 | V | |
I_{IN} | Input current | V_{IN} = 8 V, I_{OUT }= 20 A | 3.6 | A | ||
No load input current | V_{IN} = 12 V, I_{OUT }= 0 A | 60 | mA | |||
V_{IN(start)} | V_{IN} start voltage | 7 | V | |||
V_{IN(stop)} | V_{IN} stop voltage | 5 | V | |||
OUTPUT CHARACTERISTICS | ||||||
V_{OUT} | Output voltage | V_{IN} = 12 V, I_{OUT }= 20 A | 1.08 | 1.2 | 1.32 | V |
Line regulation | 8 ≤ V_{IN} ≤ 14 V, I_{OUT }= 20 A | 0.5% | ||||
Load regulation | V_{IN} = 12 V, 0 A ≤ I_{OUT} ≤ 20 A | 0.5% | ||||
Vout_ripple | Output ripple voltage | V_{IN} = 12 V, I_{OUT }= 20 A | 50 | mV_{P-P} | ||
Iout | Output current | 8 ≤ V_{IN} ≤ 14 | 0 | 20 | A | |
I_{OCP} | Output over current inception point | V_{IN} = 12 V | 21 | 25 | 29 | A |
SS | Soft-start time | (default) | 2.8 | ms | ||
Transient response | ||||||
ΔI | Load step | 10 A ≤ I_{OUT} ≤ 20 A | 10 | A | ||
Load slew rate | 1 | A/μS | ||||
Overshoot | 120 | mV | ||||
Settling time | 20 | μs | ||||
SYSTEM CHARACTERISTICS | ||||||
f_{SW} | Switching frequency | 300 | kHz | |||
η_{PK} | Peak efficiency | V_{IN} = 12 V, 0 A ≤ I_{OUT} ≤ 20 A | 90% | |||
η | Full load efficiency | V_{IN} = 12 V, I_{OUT }= 20 A | 85% | |||
T_{OPER} | Operating temperature range | 8 ≤ V_{IN} ≤ 14 V, 0 A ≤ I_{OUT} ≤ 20 A | –40 | 60 | °C |
Table 63 lists of materials for the 12-V Input, 1.2-V Output, 20-A (maximum) Output Current Converter design.
REFERENCE DESIGNATOR | QTY | VALUE | DESCRIPTION | SIZE | PART NUMBER | MFR |
---|---|---|---|---|---|---|
C1, C2, C9, C17 | 4 | 100 nF | Ceramic, 25 V, X7R, 10% | 0603 | Std | Std |
C11 | 1 | 680 µF | Tantalum, 6.3 V, 10% | 7343 (D) | TPSE687K006R0045 | AVX |
C13, C14 | 2 | 47 µF | Ceramic, 6.3 V, X7R, 10% | 1210 | Std | Std |
C15, C18 | 2 | 1 µF | Ceramic, 16 V, X7R, 10% | 0805 | Std | Std |
C16 | 1 | 1.0 nF | Ceramic, 25 V, X7R, 10% | 0603 | Std | Std |
C20 | 1 | 10 nF | Ceramic, 50 V, X7R, 10% | 0603 | Std | Std |
C21 | 1 | 1.0 µF | Ceramic, 25 V, X7R, 10% | 1206 | Std | Std |
C3, C4 | 2 | 22 µF | Ceramic, 25 V, X7R, 10% | 1210 | Std | Std |
C5 | 1 | 330 µF | Aluminum, 25 V, 150 mΩ, FC series | 10 mm x 12 mm | EEVFC1E331P | Panasonic |
C6 | 1 | 680 pF | Ceramic, 50 V, X7R, 10% | 0603 | Std | Std |
C7 | 1 | 2.2 nF | Ceramic, 50 V, X7R, 10% | 0603 | Std | Std |
C8 | 1 | 820 pF | Ceramic, 50 V, X7R, 10% | 0603 | Std | Std |
D1, D2 | 2 | RED | LED, Red, 20-mA, 6-mcd | 0603 | LTST-C190CKT | Lite On |
J1, J2 | 2 | D120/2DS | Terminal block, 2-pin, 15-A, 5.1mm | 0.40 inch x 0.35 inch | ED120/2DS | On Shore Technology |
J3, J4 | 2 | L35 | Type L - copper single conductor, one-hole mount | 0.813 inch x 0.375 inch | L35 | Thomas and Betts |
J6 | 1 | 86479-3 | Male right angle 2 x 5-pin, 100mil spacing | 0.607 inch x 0.484 inch | 86479-3 | AMP |
JP1, JP2 | 2 | PEC02SAAN | Header, 2-pin, 100 mil Spacing | 0.100 inch x 2 | PEC02SAAN | Sullins |
L1 | 1 | 0.75 µH | Inductor, SMT, 0.75 µH, 1.2 mΩ, 31A | 0.512 x 0.571 inch | PG0077.801 | Pulse |
Q1 | 1 | CSD16404Q5A | MOSFET, N-channel, 25 V, 20 A, 4.1 mΩ | QFN5X6mm | CSD16404Q5A | TI |
Q2, Q3 | 2 | CSD16325Q5 | MOSFET, N-channel, 25 V, 33 A, 1.7 mΩ | QFN-8 POWER | CSD16325Q5 | TI |
R1, R2 | 2 | 1 kΩ | Resistor, 1/16-W, 5% | 0603 | Std | Std |
R10, R17, R19 | 3 | 10 kΩ | Resistor, 1/16W, 1% | 0603 | Std | Std |
R12 | 1 | 2.74 kΩ | Resistor, 1/8W, 1% | 1206 | Std | Std |
R13 | 1 | 100 kΩ | Resistor, 1/16W, 1% | 0603 | Std | Std |
R14 | 1 | 200 Ω | Resistor, 1/16W, 1% | 0603 | Std | Std |
R15 | 1 | 0 Ω | Resistor, 1/16W, 1% | 0603 | Std | Std |
R16 | 1 | 6.19 kΩ | Resistor, 1/16W, 1% | 0603 | Std | Std |
R3, R9 | 2 | 10 Ω | Resistor, 1/16W, 1% | 0603 | Std | Std |
R4 | 1 | 36.5 kΩ | Resistor, 1/16W, 1% | 0603 | Std | Std |
R5 | 1 | 54.9 kΩ | Resistor, 1/16W, 1% | 0603 | Std | Std |
R6 | 1 | 4.99 kΩ | Resistor, 1/16W, 1% | 0603 | Std | Std |
R7, R11, R18 | 3 | 49.9 Ω | Resistor, 1/16W, 1% | 0603 | Std | Std |
R8 | 1 | 2.74 kΩ | Resistor, 1/16W, 1% | 0603 | Std | Std |
U1 | 1 | TPS40400RHL | 3.0 V to 20 V PMBus synchronous buck controller | QFN-24 | TPS40400RHL | TI |
The following design example is for an output of 1.2 V at 20-A maximum, with an input range of 8 V to 14 V.
This design example is calculated for a switching frequency of 300 kHz to improve efficiency. The switching frequency can be changed with the Fusion GUI, but some components may need to be revised at other switching frequencies.
The output inductor value is determined by the peak-to-peak ripple at high line, and in this case a value of 30% of output current maximum is used.
For this design a 750-nH inductor from Pulse (PG0077.801) was selected. The actual ripple current should now be recalculated using the actual inductance value.
With this ripple current, the inductor RMS and peak current values can be calculated.
The RMS value of a zero-average triangular wave is given by Equation 38.
At maximum load and maximum line, the peak inductor current is given by Equation 39.
The DCR of the selected inductor (from the data sheet) is 1.2 mΩ. Inductor conduction losses are described in Equation 40.
The selection of the output capacitor is typically affected by the output transient response requirement. Equation 41 and Equation 42 can be used to over-estimate the voltage deviation to account for delays in the loop bandwidth and can be used to determine the required output capacitance. The estimate of C_{OUT} based on overshoot is shown in Equation 41.
The estimate of C_{OUT} based on undershoot is shown in Equation 42.
When V_{IN(min)} > 2 x V_{OUT}, use the overshoot equation (V_{Overshoot)} to calculate minimum output capacitance.
When V_{IN(min)} < 2 x V_{OUT} use the undershoot equation (V_{Undershoot}). In this design example, V_{IN(min)} is much larger than 2 x V_{OUT} so Equation 43 is used to determine the required minimum output capacitance.
With a minimum capacitance, the maximum allowable ESR is determined by the maximum ripple voltage and is approximated by Equation 44.
The factor of 8 in the equation above results from the calculation of capacitor voltage resulting from a triangular current. For this design, a 680-µF, 45-mΩ ESR, 5-nH ESL tantalum and two, 47-µF, 3-mΩ ESR, 0.9-nH ESL ceramic capacitors were selected for a total capacitance of 780 µF.
With the output capacitance known, it is possible to calculate the charge current during start-up and determine the minimum saturation current rating for the inductor. The start-up charging current is shown in Equation 45 and the resulting peak inductor current is shown in Equation 46 .
The input capacitor is selected to limit the input ripple voltage to 20% or less of V_{IN}. The ripple voltage is due to the current flowing in the input capacitor’s ESR as well as capacitance charging and discharging. To simplify the calculations, an infinitely large series input inductance is assumed. With an infinite inductor, the input capacitor current is calculated to be 5.6 Arms.
For reasons of availability, consider the capacitor EEVFC1E331P, which is an electrolytic, 330-µF, 25-V capacitor with 150-mΩ of ESR and 100-nH ESL. This capacitor has an rms current rating of 670 mA. With the calculated rms value of the capacitor current of 5.6 Arms, this implies that needs to be additional capacitance with a much lower ESR across the input bus in order to divert most of the AC current to this low ESR capacitor.
Another readily available capacitor is selected. A 22-µF, ceramic, 25-V, 10-mΩ ESR, 0.9-nH ESL device, two in parallel. With these capacitors in parallel, the ripple in the electrolytic is well within its rating with a value of 329 mA_{rms}.
The high-side and low-side MOSFETs, Q_{HS} and Q_{LS}, are selected based on several factors including:
These devices are selected:
LOCATION | PART NUMBER | VOLTAGE RATING (V) | R_{DS(on) }
(mΩ) |
GATE CHARGE Q_{G}(nC) |
QTY |
---|---|---|---|---|---|
High-side | CSD16404Q5A | 25 | 4.1 | 8 | 1 |
Low-side | CSD16325Q5 | 25 | 1.7 | 25 | 2 |
Because the selected MOSFETs are switch very quickly, the device is programmed to have the shorter dead-time of 25 ns.
The PMBus address for the device must be read from the ADDR0 and ADDR1 pins. Each pin has an internal fixed current source and the resulting developed voltage is read and converted to the desired device address. The external resistors R_{ADDR0} and R_{ADDR1} from the address pins to ground set eight possible states for a total of 64 possible addresses. The address states are determined by voltages on the address pins per Table 65.
DIGIT | RESISTANCE (kΩ) |
---|---|
0 | 10 |
1 | 15.4 |
2 | 23.7 |
3 | 36.5 |
4 | 54.9 |
5 | 84.5 |
6 | 130 |
7 | 200 |
For this design, the address of 34 octal, or 28 decimal is selected arbitrarily. In order to achieve this address, the ADDR0 resistor R5 would be 54.9 kΩ and the ADDR1 resistor R4 would be 36.5 kΩ.
Current sensing for the TPS40400 device is typically done by sensing the voltage drop across the output inductor’s (L1) DC resistance. In order to do this, the large AC switching voltage forced across L1 must be filtered out so that the measured voltage is only the DC drop. This is done by placing an R-C filter directly across the output choke (high-frequency filter) L1. The R-C combination is chosen such that it provides enough filtering for the application and the time constant is chosen to match that of the output inductor and its ESR, which is shown in Equation 47.
Usually a capacitor value is chosen between 10 nF and 1 µF for this location. A value of 100 nF is arbitrarily chosen, which yields Equation 48.
Choose a standard value of 6.19 kΩ.
The capacitor C17 should be placed as close to the ISNS+ and ISNS– pins as possible to provide good bypass filtering. R16 should be placed close to the inductor to prevent traces with the switch node voltage from being propagated across the PCB and getting close to sensitive pins of the TPS40400 device.
Three pins on the TPS40400 device have DC bias voltages. It is necessary to add small decoupling capacitors to these pins. Table 66 shows the recommended minimum values.
DEVICE LOCATION | RECOMMENDED MINIMUM VALUE | FUNCTION | SELECTED VALUE |
---|---|---|---|
C_{BP3}, (C18) | 0.1-µF low ESR | V_{CC} for internal controls of the device | 1-µF ceramic |
C_{BP6}, (C15) | 1-µF low ESR | V_{CC} for gate drivers | 1-µF ceramic |
C_{VDD}, (C1) and (C2) | 0.1-µF low ESR | V_{CC} for input power to the device | 2 x 100 nF, with additional series 10-Ω filter resistor R3 to filter out switching noise from the power MOSFETs |
Selection of the bootstrap capacitor is based on the total gate charge of the high-side MOSFET and the allowable ripple on the BOOT pin. A ripple of 0.2 V is chosen as maximum for this design. This yields a value described in Equation 49.
Choose a standard value of 100 nF. Additionally, a series resistor R9 is added in order to reducing the turn-on speed of the high-side MOSFET, Q1.
For this design, the snubber function is designed based on an allowable snubber power dissipation. A target value of between 0.25% and 0.5% of the rated output power (P_{OUT}) is used as the starting point for the calculation of the snubber values. Once the snubber values are determined and real hardware is obtained, the snubber values can be adjusted to achieve better results.
Using the Texas Instruments SwitcherPro™ design tool and the resulting plant (system) bode plot, a crossover frequency of 20 kHz is selected with 45° of phase margin. The resulting compensation components are listed in Table 67.
COMPONENT LOCATION | VALUE |
---|---|
R6 | 4.99 kΩ |
R8 | 2.74 kΩ |
C6 | 680 pF |
C7 | 2.2 nF |
C8 | 820 pF |
The output voltage can be set by choosing and calculating R1 and R_{BIAS}. The V_{OUT} set point is shown in Equation 53.
In this design R1 was chosen to be 10 kΩ. R_{BIAS} is calculated to be 10 kΩ.
Remote sensing can be accomplished with the differential amplifier as shown in Figure 22. Resistors RS1 and RS2 (R7 and R18 in the schematic above) are used if the sense connections fail or get damaged. The values of RS1 and RS2 are bound by an upper value such that the voltage drop across them does not introduce appreciable voltage regulation error from the bias current, and a lower value such that the voltage drop in the load wires which appears across these resistors does not dissipate appreciable power. Values between 10 Ω to 50 Ω are usually chosen.
Figure 27 shiws the design process and component selection for a synchronous buck converter using the TPS40400 device. The design goal parameters are listed in Table 68.
PARAMETER | TEST CONDITIONS | MIN | NOM | MAX | UNIT | |
---|---|---|---|---|---|---|
INPUT CHARACTERISTICS | ||||||
V_{IN} | Input voltage | 8 | 12 | 14 | V | |
I_{IN} | Input current | V_{IN} = 8 V, I_{OUT }= 5 A | 3.5 | A | ||
No load input current | V_{IN} = 12 V, I_{OUT }= 0 A | 60 | mA | |||
V_{IN(start)} | V_{IN} start voltage | 7 | V | |||
V_{IN(stop)} | V_{IN} stop voltage | 6 | V | |||
OUTPUT CHARACTERISTICS | ||||||
V_{OUT} | Output voltage | V_{IN} = 12 V, I_{OUT }= 5 A | 4.75 | 5 | 5.25 | V |
Line regulation | 8 ≤ V_{IN} ≤,14 V, I_{OUT }= 5 A | 0.5% | ||||
Load regulation | V_{IN} = 12 V, 0 A ≤ I_{OUT} ≤ 5 A | 0.5% | ||||
V_{OUT(ripple)} | Output ripple voltage | V_{IN} = 12 V, I_{OUT }= 5 A | 50 | mV_{P-P} | ||
Iout | Output current | 8 ≤ V_{IN} ≤ 14 | 0 | 5 | A | |
I_{OCP} | Output over current inception point | V_{IN} = 12 V | 6.7 | 8 | 9.3 | A |
SS | Soft-start time | (default) | 5 | ms | ||
Transient response | ||||||
ΔI | Load step | 2 A ≤ I_{OUT} ≤ 5 A | 3 | A | ||
Load slew rate | 1 | A/μS | ||||
Overshoot | 500 | mV | ||||
Settling time | 50 | μs | ||||
SYSTEM CHARACTERISTICS | ||||||
f_{SW} | Switching frequency | 300 | kHz | |||
η_{PK} | Peak efficiency | V_{IN} = 12 V, 0 A ≤ I_{OUT} ≤ 5 A | 90% | |||
η | Full load efficiency | V_{IN} = 12 V, I_{OUT }= 5 A | 85% | |||
T_{OPER} | Operating temperature range | 8 ≤ V_{IN} ≤ 14 V, 0 A ≤ I_{OUT} ≤ 5 A | –40 | 60 | °C |
Table 69 lists the materials for Design Example 2.
REFERENCE DESIGNATOR | QTY | VALUE | DESCRIPTION | SIZE | PART NUMBER | MFR |
---|---|---|---|---|---|---|
C1, C2, C9, C17 | 4 | 0.1 µF | Ceramic, X7R, 25 V, 20% | 0603 | Standard | Standard |
C3, C4 | 2 | 22 µF | Ceramic, X7R, 25 V, 10% | 1210 | Standard | Standard |
C5 | 1 | 330 µF | Aluminum, 25 V, 20% | 10x12mm | EEVFC1E331P | Panasonic |
C6 | 1 | 2700 pF | Ceramic, X7R, 10 V, 20% | 0603 | Standard | Standard |
C7 | 1 | 470 pF | Ceramic, X7R, 10 V, 20% | 0603 | Standard | Standard |
C8 | 1 | 2700 pF | Ceramic, X7R, 10 V, 20% | 0603 | Standard | Standard |
C11 | 1 | 680 µF | Tantalum, 6.3 V, 20% | 7343 (D) | TPSE6870060045 | Standard |
C13, C14 | 2 | 47 µF | Ceramic, X7R, 6.3 V, 20% | 1210 | GRM32ER60J476M | Standard |
C15, C18 | 2 | 1 µF | Ceramic, X7R, 16 V, 20% | 0603 | Standard | Standard |
C16 | 1 | 1000 pF | Ceramic, X7R, 25 V, 20% | 0603 | Standard | Standard |
L1 | 1 | 6.8 µH | Inductor, 6.8 µH, 12 mΩ | PF0553.682NL | Pulse | |
Q1 | 1 | CSD16325Q5 | Transistor, N-channel MOSFET, 25 V, 100 A, 10 Ω | QFN 5x6 | CSD16325Q5 | TI |
Q2 | 1 | CSD16325Q5 | Transistor, N-channel, 25 V, 100 A, 10 Ω | QFN 5x6 | CSD16325Q5 | TI |
R3 | 1 | 10 Ω | Resistor, 1/16W, 5% | 0603 | Standard | Standard |
R4 | 1 | 39.2 kΩ | Resistor, 1/16W, 1% | 0603 | Standard | Standard |
R5 | 1 | 64.9 kΩ | Resistor, 1/16W, 1% | 0603 | Standard | Standard |
R6 | 1 | 10.7 kΩ | Resistor, 1/16W, 1% | 0603 | Standard | Standard |
R7, R18 | 2 | 49.9 Ω | Resistor, 1/16W, 1% | 0603 | Standard | Standard |
R8 | 1 | 1.62 kΩ | Resistor, 1/16W, 1% | 0603 | Standard | Standard |
R10 | 1 | 10 kΩ | Resistor, 1/16W, 1% | 0603 | Standard | Standard |
R12 | 1 | 2.7 Ω | Resistor, 1/16W, 5% | 0603 | Standard | Standard |
R14 | 1 | 0.0 Ω | Resistor, 1/16W, 1% | 0603 | Standard | Standard |
R16 | 1 | 5.71 kΩ | Resistor, 1/16W, 1% | 0603 | Standard | Standard |
R17 | 1 | 1.33 kΩ | Resistor, 1/16W, 1% | 0603 | Standard | Standard |
U1 | 1 | TPS40400 | 3.0V-20V PMBus synchronous buck controller | 24-pin QFN | TPS40400RHL | Texas Instruments |
Internal configuration of the TPS40400 device is handled via the PMBus (pins CLK and DATA) and the Fusion Digital Power Designer (GUI interface). An example of the configuration window that is used to make internal configuration changes to the TPS40400 device is shown below in Figure 32.
Figure 32 shows are the user changeable parameters of the TPS40400 device and these consist of the following sections.
The status section is read only, and consists of data read from the TPS40400 device such as V_{OUT}, I_{OUT}, V_{IN}, and status words. A full description of each command and status word is available in the Register Maps section.
Configuration changes can be implemented by changing the value in the Value/Edit box of each parameter. Most boxes allow direct parameter changes such as voltage or current, but some boxes such as IOUT_OC_FAULT_RESPONSE provide a pop-up configuration window as shown in Figure 33, and others provide a pull-down menu. Select the appropriate radio buttons to make the desired changes.
To implement the changes to the device, click on the [Write to Hardware] button. This stores the changes to the device in volatile memory, so these changes are lost when input power is cycled. To permanently make changes and commit those changes to non-volatile memory, click on the [Store RAM to Flash] button.