SLVSC16B August   2013  – July 2016 TPS43330A-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 DC Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Boost Controller
      2. 7.3.2 Gate-Driver Supply (VREG, EXTSUP)
      3. 7.3.3 External P-Channel Drive (GC2) and Reverse Battery Protection
      4. 7.3.4 Undervoltage Lockout and Overvoltage Protection
      5. 7.3.5 Thermal Protection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Buck Controllers: Normal Mode PWM Operation
        1. 7.4.1.1 Frequency Selection and External Synchronization
        2. 7.4.1.2 Enable Inputs
        3. 7.4.1.3 Feedback Inputs
        4. 7.4.1.4 Soft-Start Inputs
        5. 7.4.1.5 Current-Mode Operation
        6. 7.4.1.6 Current Sensing and Current Limit With Foldback
        7. 7.4.1.7 Slope Compensation
        8. 7.4.1.8 Power-Good Outputs and Filter Delays
        9. 7.4.1.9 Light-Load PFM Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Boost Component Selection
        2. 8.2.2.2  Boost Maximum Input Current IIN_MAX
        3. 8.2.2.3  Boost Inductor Selection, L
        4. 8.2.2.4  Inductor Ripple Current, IRIPPLE
        5. 8.2.2.5  Peak Current in Low-Side FET, IPEAK
        6. 8.2.2.6  Right Half-Plane Zero RHP Frequency, fRHP
        7. 8.2.2.7  Output Capacitor, COUTx
        8. 8.2.2.8  Bandwidth of Boost Converter, fC
        9. 8.2.2.9  Output Ripple Voltage Due to Load Transients, ∆VOUTx
        10. 8.2.2.10 Selection of Components for Type II Compensation
        11. 8.2.2.11 Input Capacitor, CIN
        12. 8.2.2.12 Output Schottky Diode D1 Selection
        13. 8.2.2.13 Low-Side MOSFET (BOT_SW3)
        14. 8.2.2.14 BuckA Component Selection
          1. 8.2.2.14.1 BuckA Component Selection
          2. 8.2.2.14.2 Current-Sense Resistor RSENSE
        15. 8.2.2.15 Inductor Selection L
        16. 8.2.2.16 Inductor Ripple Current IRIPPLE
        17. 8.2.2.17 Output Capacitor COUTA
        18. 8.2.2.18 Bandwidth of Buck Converter fC
        19. 8.2.2.19 Selection of Components for Type II Compensation
        20. 8.2.2.20 Resistor Divider Selection for Setting VOUTA Voltage
        21. 8.2.2.21 BuckB Component Selection
        22. 8.2.2.22 Resistor Divider Selection for Setting VOUT Voltage
        23. 8.2.2.23 BuckX High-Side and Low-Side N-Channel MOSFETs
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 Example 1
      2. 8.3.2 Example 2
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Boost Converter
      2. 10.1.2 Buck Converter
      3. 10.1.3 Other Considerations
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation Derating Profile, 38-Pin HTTSOP PowerPAD Package
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Revision History

Changes from A Revision (September 2013) to B Revision

  • Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section.Go
  • Removed Package and Ordering Information section, see the POA at the end of the data sheetGo
  • Removed Simplified Application Schematic, Example 2 from the data sheetGo
  • Renamed Simplified Application Schematic, Example 3 to Simplified Application Schematic, Example 2Go
  • Changed L1 value from 4 µH to 3.9 µH under the Application Example 2 – Component Proposals table Go

Changes from * Revision (August 2013) to A Revision

  • Changed document status from Product Preview to Production DataGo