SLVSB16E November   2011  – December 2015 TPS43340-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable Inputs
      2. 7.3.2 Linear Regulator (LREG1)
      3. 7.3.3 Gate-Driver Supply (VREG, EXTSUP)
      4. 7.3.4 External P-Channel Drive (GPULL) and Reverse Battery Protection
      5. 7.3.5 Undervoltage Lockout and Overvoltage Protection
      6. 7.3.6 Synchronous Buck Converter Buck3
        1. 7.3.6.1 Soft Start and Foldback Functions
        2. 7.3.6.2 Current-Mode Control and Current-Limit Protection
        3. 7.3.6.3 Operation in Dropout and Undervoltage Protection
        4. 7.3.6.4 Slew Rate Control (SLEW)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Buck Controllers: Normal Mode PWM Operation
        1. 7.4.1.1 Setting the Operating Frequency
        2. 7.4.1.2 Feedback Inputs
        3. 7.4.1.3 Soft-Start Inputs
        4. 7.4.1.4 Current-Mode Operation
        5. 7.4.1.5 Current Sensing and Current Limit With Foldback
        6. 7.4.1.6 Slope Compensation
        7. 7.4.1.7 Reset Outputs and Filter Delays
        8. 7.4.1.8 Light-Load PFM Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 High- and Low-Side Power NMOS Selection for the Buck Converters
        2. 8.2.2.2 Buck1 Component Selection
        3. 8.2.2.3 Buck2 Component Selection
        4. 8.2.2.4 Buck3 Component Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Power Dissipation
      1. 10.3.1 Power Dissipation of Buck1 and Buck2 (VOUT1 and VOUT2)
      2. 10.3.2 Power Dissipation of Buck Converter Buck3 (VOUT3)
        1. 10.3.2.1 High-Side Switch
        2. 10.3.2.2 Low-Side Switch
        3. 10.3.2.3 Linear Regulator (LREG1)
        4. 10.3.2.4 IC Power Consumption
    4. 10.4 Thermal Considerations
      1. 10.4.1 Phase Configuration
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Qualified for Automotive Applications
  • AEC-Q100 Test Guidance With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature
    • Device HBM ESD Classification Level H1C
    • Device CDM ESD Classification Level C3B
  • Input Range up to 40 V, (Transients up to 60 V)
  • Input Voltage Range: 4 V to 40 V
    • Transients up to 60 V
  • Dual-Output Synchronous Buck Controller
    • Peak Gate Drive Current 0.6 A
    • Automatic Low-Power Mode Operation
    • Low-Power-Mode IQ : 30 µA (One Buck On), 35 µA (Two Bucks On)
  • Low Shutdown Current, Ish = 5 μA Typical
  • Single Synchronous Buck Regulator Converter BUCK3
    • Max Output Current 2 A
  • Linear Regulator LREG1
  • Separate Enable Inputs (EN1, EN2, EN3, EN4)
  • Internal Oscillator, Programmable via External Resistor, 150 kHz to 600 kHz for Switching Frequency fSW_BUCK1,2,3
  • Integrated PLL, External Synchronization Frequency: 150 kHz to 600 kHz
  • Switch-Mode Regulators Operate With 180° Phase-Shift
  • Reset Output for All Output Rails
  • Supply and Overvoltage Detection and Shutdown
  • Thermally Enhanced PowerPAD™ Package
    • 48-Pin HTQFP (PHP)

2 Applications

  • Automotive Infotainment, Head Unit, Navigation, Audio and Clusters
  • Advanced Driver Assistance System (ADAS)
  • Automotive and Industrial Multi-Rail DC Power Distribution Systems

3 Description

The TPS43340-Q1 is a quad rail power supply featuring two synchronous Buck Controller with 0.6-A gate drive, one synchronous 2-A Buck Converter and a 300-mA LDO with low quiescent current. The device is designed to power the entire system including MCU and DSP straight from the car battery respectively input voltages up to 40 V. The device features integrated short-circuit and overcurrent protection on the gate-drive outputs for the buck regulator controllers and independent current-foldback control for each buck regulator supply during regulator output short to ground. Each output supply incorporates a soft start to ensure that on initial power up these regulated outputs are not in current limit. Implementation of reset delay on power up allows the outputs of Buck1, Buck2, Buck3 and the linear regulator to get to stable regulation. An external capacitor sets the delay to a maximum range of 300 ms. Each power-supply output has adjustable output voltage based on the external resistor-network settings. The device has sequencing control during power up and power down of the output rails, based on the enable-and-disable control or soft start.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
TPS43340-Q1 HTQFP (48) 7.00 mm × 7.00 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

TPS43340-Q1 simplschem_lvsb16.gif