SLVSCT3 March   2015 TPS51275B-1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Typical Application Diagram
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  PWM Operations
      2. 8.3.2  Adaptive On-Time and PWM Frequency Control
      3. 8.3.3  Light-Load Condition in Out-of-Audio Operation
      4. 8.3.4  Enable and Power Good
      5. 8.3.5  Soft-Start and Discharge
      6. 8.3.6  VREG5 and VREG3 Linear Regulators
      7. 8.3.7  VCLK for Charge Pump
      8. 8.3.8  Overcurrent Protection
      9. 8.3.9  Output Overvoltage and Undervoltage Protection
      10. 8.3.10 Undervoltage Lockout Protection
      11. 8.3.11 Over-Temperature Protection (OTP)
    4. 8.4 Device Functional Modes
      1. 8.4.1 D-CAP Mode
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 External Components Selection
          1. 9.2.2.1.1 Step 1. Determine the Value of R1 and R2
          2. 9.2.2.1.2 Step 2. Select the Inductor
          3. 9.2.2.1.3 Step 3. Select Output Capacitors
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Placement
      2. 11.1.2 Routing (Sensitive Analog Portion)
      3. 11.1.3 Routing (Power portion)
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

RUK Package
20-Pin WQFN With Thermal Pad
Top View
TPS51275B-1 po_20_ruk_slvsct3.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
CS1 1 O Sets the channel 1 OCL trip level
CS2 5 O Sets the channel 2OCL trip level
DRVH1 16 O High-side driver output
DRVH2 10 O High-side driver output
DRVL1 15 O Low-side driver output
DRVL2 11 O Low-side driver output
EN1 20 I Channel 1 enable
EN2 6 I Channel 2 enable
PGOOD 7 O Power good output flag. Open drain output. Pull up to external rail through a resistor
SW1 18 O Switch-node connection
SW2 8 O Switch-node connection
VBST1 17 I Supply input for high-side MOSFET (bootstrap terminal). Connect a capacitor from this pin to the SWx pin.
VBST2 9 I
VCLK 19 O Clock output for charge pump
VFB1 2 I Voltage feedback input
VFB2 4 I
VIN 12 I Power conversion voltage input. Apply the same voltage as drain voltage of high-side MOSFETs of channel 1 and channel 2.
VO1 14 I Output voltage input, 5-V input for switch-over
VREG3 3 O 3.3-V LDO output
VREG5 13 O 5-V LDO output
Thermal pad — Ground (GND) terminal, solder to the ground plane