SLVSAE6A July   2010  – August 2014 TPS53129

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematics
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
  8. 8 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagrams
    3. 9.3 Feature Description
      1. 9.3.1 PWM Operation
      2. 9.3.2 Light-Load Condition
      3. 9.3.3 Drivers
      4. 9.3.4 PWM Frequency and Adaptive On-Time Control
      5. 9.3.5 5-Volt Regulator
      6. 9.3.6 Soft Start
      7. 9.3.7 Pre-Bias Support
    4. 9.4 Device Functional Modes
      1. 9.4.1 Output Discharge Control
      2. 9.4.2 Over Current Limit
      3. 9.4.3 Over/Under Voltage Protection
      4. 9.4.4 UVLO Protection
      5. 9.4.5 Thermal Shutdown
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Typical Application Circuits
      2. 10.2.2 Design Requirements
      3. 10.2.3 Detailed Design Procedure
      4. 10.2.4 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Suggestions
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

12 Layout

12.1 Layout Suggestions

  • Keep the input switching current loop as small as possible.
  • Place the input capacitor (C3,C6) close to the top switching FET. The output current loop should also be kept as small as possible.
  • Keep the SW node as physically small and short as possible as to minimize parasitic capacitance and inductance and to minimize radiated emissions. Kelvin connections should be brought from the output to the feedback pin (FBx) of the device.
  • Keep analog and non-switching components away from switching components.
  • Make a single point connection from the signal ground to power ground.
  • Do not allow switching current to flow under the device.

12.2 Layout Example

TPS53129 layout_ds_a_slvsae6.gif Figure 24. Board Layout