SLVSAG1C December   2010  – December 2015 TPS54327

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM Operation
      2. 7.3.2 PWM Frequency and Adaptive ON-Time Control
      3. 7.3.3 Soft-Start and Prebiased Soft-Start
      4. 7.3.4 Current Protection
      5. 7.3.5 UVLO Protection
      6. 7.3.6 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Forced CCM Operation
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Output Voltage Resistors Selection
        2. 8.2.2.2 Output Filter Selection
        3. 8.2.2.3 Input Capacitor Selection
        4. 8.2.2.4 Bootstrap Capacitor Selection
        5. 8.2.2.5 VREG5 Capacitor Selection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) (1)
MIN MAX UNIT
Input voltage VIN, EN –0.3 20 V
VBST –0.3 26 V
VBST (10 ns transient) –0.3 28 V
VBST (vs SW) –0.3 6.5 V
VFB, SS –0.3 6.5 V
SW –2 20 V
SW (10 ns transient) –3 22 V
Output voltage VREG5 –0.3 6.5 V
GND –0.3 0.3 V
Voltage from GND to thermal pad, Vdiff –0.2 0.2 V
Operating junction temperature, TJ –40 150 °C
Storage temperature, Tstg –55 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIN Supply input voltage 4.5 18 V
VI Input voltage VBST –0.1 24 V
VBST (10 ns transient) –0.1 27
VBST(vs SW) –0.1 6
SS –0.1 5.7
EN –0.1 18
VFB –0.1 5.5
SW –1.8 18
SW (10 ns transient) –3 21
GND –0.1 0.1
VO Output voltage VREG5 –0.1 5.7 V
IO Output Current IVREG5 0 10 mA
TA Operating free-air temperature –40 85 °C
TJ Operating junction temperature –40 150 °C

6.4 Thermal Information

THERMAL METRIC(1) TPS54327 UNIT
DDA (HSOP) DRC (VSON)
8 PINS 10 PINS
RθJA Junction-to-ambient thermal resistance 42.1 43.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 50.9 55.4 °C/W
RθJB Junction-to-board thermal resistance 31.8 18.9 °C/W
ψJT Junction-to-top characterization parameter 5 0.7 °C/W
ψJB Junction-to-board characterization parameter 13.5 19.1 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance 7.1 5.3 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

over operating free-air temperature range VIN = 12 V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
IVIN Operating - non-switching supply current VIN current, TA = 25°C, EN = 5 V,
VFB = 0.8 V
800 1200 μA
IVINSDN Shutdown supply current VIN current, TA = 25°C, EN = 0 V 1.8 10 μA
LOGIC THRESHOLD
VENH EN high-level input voltage EN 1.6 V
VENL EN low-level input voltage EN 0.45 V
VFB VOLTAGE AND DISCHARGE RESISTANCE
VFBTH VFB threshold voltage TA = 25°C, VO = 1.05 V, continuous mode 749 765 781 mV
IVFB VFB input current VFB = 0.8 V, TA = 25°C 0 ±0.1 μA
VREG5 OUTPUT
VVREG5 VREG5 output voltage TA = 25°C, 6 V < VIN < 18 V,
0 < IVREG5 < 5 mA
5.2 5.5 5.7 V
VLN5 Line regulation 6 V < VIN < 18 V, IVREG5 = 5 mA 25 mV
VLD5 Load regulation 0 mA < IVREG5 < 5 mA 100 mV
IVREG5 Output current VIN = 6 V, VREG5 = 4 V, TA = 25°C 60 mA
MOSFET
RDS(on)h High-side switch resistance 25°C, VBST - SW = 5.5 V 100
RDS(on)l Low-side switch resistance 25°C 70
CURRENT LIMIT
Iocl Current limit L out = 1.5 μH(1), TA = -20ºC to 85ºC 3.5 4.2 5.7 A
THERMAL SHUTDOWN
TSDN Thermal shutdown threshold Shutdown temperature (1) 165 °C
Hysteresis (1) 30
ON-TIME TIMER CONTROL
tON ON-time VIN = 12 V, VO = 1.05 V 150 ns
tOFF(MIN) Minimum OFF-time TA = 25°C, VFB = 0.7 V 260 310 ns
SOFT START
ISSC SS charge current VSS = 0 V 1.4 2 2.6 μA
ISSD SS discharge current VSS = 0.5 V 0.05 0.1 mA
UVLO
UVLO UVLO threshold Wakeup VREG5 voltage 3.45 3.75 4.05 V
Hysteresis VREG5 voltage 0.17 0.32 0.45
(1) Not production tested.

6.6 Typical Characteristics

VIN = 12 V, TA = 25°C (unless otherwise noted)
TPS54327 fig 1.gif
Figure 1. VIN Current vs Junction Temperature
TPS54327 cur_vi_lvsag1.gif
Figure 3. EN Current vs EN Voltage
TPS54327 fs_vi_lvsag1.gif
Figure 5. Switching Frequency vs Input Voltage
TPS54327 fig 2.gif
Figure 2. VIN Shutdown Current vs Junction Temperature
TPS54327 Fig_8.gif
Figure 4. Efficiency vs Output Current
TPS54327 fs_io_lvsag1.gif
Figure 6. Switching Frequency vs Output Current