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Product details

Parameters

Vin (Min) (V) 4.5 Vin (Max) (V) 18 Vout (Min) (V) 0.76 Vout (Max) (V) 7 Iout (Max) (A) 3 Iq (Typ) (mA) 0.8 Switching frequency (Min) (kHz) 700 Switching frequency (Max) (kHz) 700 Features Enable, Synchronous Rectification, Soft Start Adjustable Operating temperature range (C) -40 to 85 Rating Catalog Regulated outputs (#) 1 open-in-new Find other Buck converters (integrated switch)

Package | Pins | Size

HSOIC (DDA) 8 19 mm² 4.9 x 3.9 VSON (DRC) 10 9 mm² 3 x 3 open-in-new Find other Buck converters (integrated switch)

Features

  • D-CAP2™ Mode Enables Fast Transient
    Response
  • Low-Output Ripple and Allows Ceramic Output
    Capacitor
  • Wide VIN Input Voltage Range: 4.5 V to 18 V
  • Output Voltage Range: 0.76 V to 7 V
  • Highly Efficient Integrated FETs Optimized
    for Lower Duty Cycle Applications
    – 100 mΩ (High-Side) and 70 mΩ (Low-Side)
  • High Efficiency, Less Than 10 µA at shutdown
  • High Initial Bandgap Reference Accuracy
  • Adjustable Soft Start
  • Prebiased Soft Start
  • 700-kHz Switching Frequency (fSW)
  • Cycle-By-Cycle Overcurrent Limit
  • APPLICATIONS
    • Wide Range of Applications for Low Voltage
      System
      • Digital TV Power Supply
      • High Definition Blu-ray Disc™ Players
      • Networking Home Terminal
      • Digital Set Top Box (STB)

All other trademarks are the property of their respective owners

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Description

The TPS54327 device is an adaptive on-time D-CAP2™ mode synchronous buck converter. TheTPS54327 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54327 uses the D-CAP2 mode control which provides a fast transient response with no external compensation components. The TPS54327 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 7 V. The device also features an adjustable soft start time. The TPS54327 is available in the 8-pin DDA package and 10-pin DRC, and is designed to operate from –40°C to 85°C.

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TPS54227 ACTIVE 4.5 V to 18 V input, 2 A synchronous step-down converter in HSOP and VSON package Pin-to-pin compatible lower current product.
TPS54427 ACTIVE 4.5V to 18V Input, 4-A Synchronous Step-Down Converter Pin-to-pin compatible higher current product (4 A).
Same functionality but is not pin-for-pin or parametrically equivalent to the compared device:
TPS563208 ACTIVE 4.5 V to 17 V input, 3 A output, synchronous step-down converter in FCCM mode This product has a smaller package with less external component count.

Technical documentation

= Top documentation for this product selected by TI
No results found. Please clear your search and try again. View all 6
Type Title Date
* Datasheet TPS54327 3-A Output Single Synchronous Step-Down Switcher With Integrated FET datasheet (Rev. C) Dec. 18, 2015
Technical articles Minimize the impact of the MLCC shortage on your power application Mar. 29, 2019
Selection guides Power Management Guide 2018 (Rev. R) Jun. 25, 2018
Application notes Optimize Output Filter on D-CAP2 for Stability Improvement Jun. 13, 2017
Application notes D-CAP2 Frequency Response Model, based on frequency domain analysis of Fixed On- Jan. 02, 2013
User guides TPS54327EVM-686, 3-A SWFT Regulator EVM Users Guide Nov. 23, 2010

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Hardware development

EVALUATION BOARDS Download
document-generic User guide
25
Description
The TPS54327EVM-686 is a fully assembled and tested circuit for evaluating the TPS54327 Synchronous Step-Down SWIFT Converter. The TPS54327EVM-686 operates from a 4.5V to 18V input and provides a 1.05V output at 3A.
Features
  • D-CAP2 Mode Enables Fast Transient Response
  • Low Output Ripple and Allows Ceramic Output Capacitor
  • Wide Vin Input Voltage Range: 4.5V to 18V
  • Output Voltage Range: 0.76 V to 5.5 V
  • Highly Efficient Integrated FETs Optimized for Lower Duty Cycle Applications
  • High Efficiency, less than 10uA at shutdown
  • High (...)

Design tools & simulation

SIMULATION MODELS Download
SLVM108.ZIP (53 KB) - PSpice Model
SIMULATION MODELS Download
SLVM310.TSC (164 KB) - TINA-TI Reference Design
SIMULATION MODELS Download
SLVM311.ZIP (39 KB) - TINA-TI Spice Model
SIMULATION TOOLS Download
PSpice® for TI design and simulation tool
PSPICE-FOR-TI — PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Features
  • Leverages Cadence PSpice Technology
  • Preinstalled library with a suite of digital models to enable worst-case timing analysis
  • Dynamic updates ensure you have access to most current device models
  • Optimized for simulation speed without loss of accuracy
  • Supports simultaneous analysis of multiple products
  • (...)

Reference designs

REFERENCE DESIGNS Download
RF Sampling 4-GSPS ADC Reference Design with 8-GHz DC-Coupled Differential Amplifier
TIDA-00431 Wideband radio frequency (RF) receivers allow greatly increased flexibility in radio designs. The wide instantaneous bandwidth allows flexible tuning without changing hardware and the ability to capture multiple channels at widely separated frequencies.

This reference design describes a wideband RF (...)

document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
High Speed Multi-Channel ADC Clock Reference Design for Oscilloscopes, Wireless Testers and Radars
TIDA-01017 — The TIDA-01017 reference design demonstrates the performance of a clocking solution for a high speed multi-channel system, analyzed by measuring the channel to channel skew for the entire input frequency range of the RF sampling ADC. Channel to channel skew is critical for phased array radar and (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
4 GHz Clock Reference Design for 12 Bit High Speed ADCs in Digital Oscilloscopes & Wireless Testers
TIDA-01015 — The TIDA-01015 is a clocking solution reference design for high speed direct RF sampling GSPS ADCs. This design showcases the significance of the sampling clock to achieve high SNR for 2nd Nyquist zone input signal frequencies. ADC12J4000 is a 12-bit, 4-GSPS RF sampling ADC with 3-dB input bandwidth (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
50-Ohm 2-GHz Oscilloscope Front-end Reference Design
TIDA-00826 This reference design is part of an analog front-end for 50Ω-input oscilloscope application. System designers can readily use this evaluation platform to process input signals from DC to 2 GHz in both frequency-domain and time-domain applications.
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Synchronization of JESD204B Giga-Sample ADCs using Xilinx Platform for Phased Array Radar Systems
TIDA-00432 This system level design shows how two ADC12J4000 evaluation modules (EVMs) can be synchronized together using a Xilinx VC707 platform. The design document describes the required hardware modifications and device configurations, including the clocking scheme. Example configuration files are shown (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Clocking Solution Reference Design for GSPS ADCs
TIDA-00359 Low cost, high performance clocking solution for GSPS data converters. This reference design discusses the use of a TRF3765, a low noise frequency synthesizer, generating the sampling clock for a 4 GSPS analog-to-digital converter (ADC12J4000). Experiments demonstrate data sheet comparable SNR and (...)
document-generic Schematic document-generic User guide
REFERENCE DESIGNS Download
Set Top Box Power Solution
PMP6638 This reference design is an example of power-trees inside a set-top-box. It performs DC-DC conversions, from 12V supply, for 1.0V/1.2V/1.8V/2.5V/3.3V/5V rails.
document-generic Schematic document-generic User guide

CAD/CAE symbols

Package Pins Download
SO PowerPAD (DDA) 8 View options
VSON (DRC) 10 View options

Ordering & quality

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