SLVSDC9B November   2016  – November 2019 TPS54824

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1.     Simplified Schematic
  3. 3 Description
    1.     Efficiency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Continuous Conduction Mode Operation (CCM)
      3. 7.3.3  VIN Pins and VIN UVLO
      4. 7.3.4  Voltage Reference and Adjusting the Output Voltage
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Enable and Adjustable UVLO
      7. 7.3.7  Soft Start and Tracking
      8. 7.3.8  Safe Start-up into Pre-Biased Outputs
      9. 7.3.9  Power Good
      10. 7.3.10 Sequencing (SS/TRK)
      11. 7.3.11 Adjustable Switching Frequency (RT Mode)
      12. 7.3.12 Synchronization (CLK Mode)
      13. 7.3.13 Bootstrap Voltage and 100% Duty Cycle Operation (BOOT)
      14. 7.3.14 Output Overvoltage Protection (OVP)
      15. 7.3.15 Overcurrent Protection
        1. 7.3.15.1 High-side MOSFET Overcurrent Protection
        2. 7.3.15.2 Low-side MOSFET Overcurrent Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Switching Frequency
        2. 8.2.2.2  Output Inductor Selection
        3. 8.2.2.3  Output Capacitor
        4. 8.2.2.4  Input Capacitor
        5. 8.2.2.5  Output Voltage Resistors Selection
        6. 8.2.2.6  Soft-start Capacitor Selection
        7. 8.2.2.7  Undervoltage Lockout Set Point
        8. 8.2.2.8  Bootstrap Capacitor Selection
        9. 8.2.2.9  PGOOD Pull-up Resistor
        10. 8.2.2.10 Compensation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Alternate Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.7 Soft Start and Tracking

The TPS54824 regulates to the SS/TRK pin while its voltage is lower than the internal reference to implement soft start. A capacitor on the SS/TRK pin to ground sets the soft start time. The SS/TRK pin has an internal pull-up current source of 5 μA that charges the external soft start capacitor. Equation 4 calculates the required soft start capacitor value. The FB voltage will follow the SS/TRK pin voltage with a 25 mV offset up to 90% of the internal voltage reference. When the SS/TRK voltage is greater than 90% of the internal reference voltage the offset increases as the effective system reference transitions from the SS/TRK voltage to the internal voltage reference.

Equation 4. TPS54824 EQ_CSS_slvsdc9.gif

If during normal operation, VIN goes below the UVLO, EN pin pulled below 1.15 V, or a thermal shutdown event occurs, the TPS54824 stops switching and the SS/TRK pin floats. When the VIN goes above UVLO, EN goes above 1.20 V, or a thermal shutdown is exited, the SS/TRK pin is discharged to near ground before reinitiating a powering up sequence.

When the COMP pin voltage is clamped by the maximum COMP clamp in an overload condition the SS/TRK pin is discharged to near the FB voltage. When the overload condition is removed, the soft-start circuit controls the recovery from the fault output level to the nominal output regulation voltage. At the beginning of recovery a spike in the output voltage may occur while the COMP voltage transitions from the maximum clamp to the value determined by the loop.

If a nominal SS/TRK capacitance of 22 nF or greater is used, TI recommends adding a 470-kΩ to 1-MΩ resistor in parallel with the SS/TRK capacitor. With higher SS/TRK capacitance and if the EN pin voltage goes low then high quickly, the SS/TRK capacitor may not fully discharge before switching begins. Adding this resistor helps discharge the SS/TRK capacitor. For the SS capacitor to fully discharge, disable the TPS54824 for a time period equal to 3 times the RC time constant of the SS/TRK capacitor and the added resistor.