SLVSDC9B November   2016  – November 2019 TPS54824

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
    1.     Simplified Schematic
  3. 3 Description
    1.     Efficiency
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed Frequency PWM Control
      2. 7.3.2  Continuous Conduction Mode Operation (CCM)
      3. 7.3.3  VIN Pins and VIN UVLO
      4. 7.3.4  Voltage Reference and Adjusting the Output Voltage
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Enable and Adjustable UVLO
      7. 7.3.7  Soft Start and Tracking
      8. 7.3.8  Safe Start-up into Pre-Biased Outputs
      9. 7.3.9  Power Good
      10. 7.3.10 Sequencing (SS/TRK)
      11. 7.3.11 Adjustable Switching Frequency (RT Mode)
      12. 7.3.12 Synchronization (CLK Mode)
      13. 7.3.13 Bootstrap Voltage and 100% Duty Cycle Operation (BOOT)
      14. 7.3.14 Output Overvoltage Protection (OVP)
      15. 7.3.15 Overcurrent Protection
        1. 7.3.15.1 High-side MOSFET Overcurrent Protection
        2. 7.3.15.2 Low-side MOSFET Overcurrent Protection
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Switching Frequency
        2. 8.2.2.2  Output Inductor Selection
        3. 8.2.2.3  Output Capacitor
        4. 8.2.2.4  Input Capacitor
        5. 8.2.2.5  Output Voltage Resistors Selection
        6. 8.2.2.6  Soft-start Capacitor Selection
        7. 8.2.2.7  Undervoltage Lockout Set Point
        8. 8.2.2.8  Bootstrap Capacitor Selection
        9. 8.2.2.9  PGOOD Pull-up Resistor
        10. 8.2.2.10 Compensation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Alternate Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.8 Typical Characteristics

TPS54824 D002_SLVSDC9.gif
Figure 1. Efficiency for 9 V Input to 1 V Output
TPS54824 D004_SLVSDC9.gif
Figure 3. Efficiency for 12 V Input to 3.3 V Output
TPS54824 D006_slvsdc9.gif
V(EN) = 0.4 V
Figure 5. VIN Pin Shutdown Current vs Junction Temperature
TPS54824 D008_slvsdc9.gif
Figure 7. EN Pin Current vs Junction Temperature
TPS54824 D010_slvsdc9.gif
Figure 9. MOSFET Rds(on) vs Junction Temperature
TPS54824 D012_slvsdc9.gif
Figure 11. COMP to SW Transconductance vs Junction Temperature
TPS54824 D014_slvsdc9.gif
V(SS/TRK) = 0.4 V
Figure 13. SS/TRK to FB Offset vs Junction Temperature
TPS54824 D015_slvsdc9.gif
Figure 15. High-side Peak Current Limit vs Junction Temperature
TPS54824 D017_slvsdc9.gif
V(FB) = 0.6 V V(PGOOD) = 5 V
Figure 17. PGOOD Leakage Current vs Junction Temperature
TPS54824 D020_slvsdc9.gif
R(RT/CLK) = 100 kΩ
Figure 19. Switching Frequency vs Junction Temperature (500 kHz)
TPS54824 D023_slvsdc9.gif
Figure 21. Switching Frequency vs RT/CLK Resistor (Low Range)
TPS54824 D003_SLVSDC9.gif
Figure 2. Efficiency for 12 V Input to 1.5 V and 0.8 V Output
TPS54824 D005_slvsdc9.gif
V(EN) = 5 V V(FB) = 0.8 V
Figure 4. VIN Pin Nonswitching Supply Current vs Junction Temperature
TPS54824 D007_slvsdc9.gif
Figure 6. EN Pin Voltage Threshold vs Junction Temperature
TPS54824 D009_slvsdc9.gif
Figure 8. Regulated FB Voltage vs Junction Temperature
TPS54824 D011_slvsdc9.gif
Figure 10. Error Amplifier Transconductance vs Junction Temperature
TPS54824 D013_slvsdc9.gif
Figure 12. SS/TRK Current vs Junction Temperature
TPS54824 D022_slvsdc9.gif
Figure 14. FB voltage vs SS/TRK Voltage
TPS54824 D016_slvsdc9.gif
Figure 16. PGOOD Thresholds vs Junction Temperature
TPS54824 D018_slvsdc9.gif
VIN = 12 V L = 0.68 µH
Figure 18. Minimum on-time vs Ambient Temperature
TPS54824 D021_slvsdc9.gif
R(RT/CLK) = 30.1 kΩ
Figure 20. Switching Frequency vs Junction Temperature (1600 kHz)
TPS54824 D024_slvsdc9.gif
Figure 22. Switching Frequency vs RT/CLK Resistor (High Range)