SLVSA05B August   2009  β€“ August 2015 TPS61086


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft-Start
      2. 7.3.2 Undervoltage Lockout (UVLO)
      3. 7.3.3 Thermal Shutdown
      4. 7.3.4 Overvoltage Prevention
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power Save Mode
      2. 7.4.2 Forced PWM Mode
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 3.3-V to 12-V Boost Converter With PFM Mode at Light Load
        1. Design Requirements
        2. Detailed Design Procedure
          1. Inductor Selection
          2. Rectifier Diode Selection
          3. Setting the Output Voltage
          4. Compensation (COMP)
          5. Input Capacitor Selection
          6. Output Capacitor Selection
        3. Application Curves
      2. 8.2.2 3.3-V to 12-V Boost Converter With Forced PWM Mode at Light Load
        1. Design Requirements
        2. Detailed Design Procedure
        3. Application Curves
    3. 8.3 System Examples
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Community Resources
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

For all switching power supplies, the layout is an important step in the design, especially at high peak currents and high switching frequencies. If the layout is not carefully done, the regulator could show stability problems as well as EMI problems. Therefore, use wide and short traces for the main current path and for the power ground tracks. The input capacitor, output capacitor, and the inductor should be placed as close as possible to the IC. Use a common ground node for power ground connecting to the PGND terminal and a different one for control ground connecting to the AGND terminal to minimize the effects of ground noise. Connect these ground nodes at the PGND terminal of the IC. The most critical current path for all boost converters is from the switching FET, through the rectifier diode, then the output capacitors, and back to ground of the switching FET. Therefore, the output capacitors and their traces should be placed on the same board layer as the IC and as close as possible between the IC's SW and PGND terminal.

10.2 Layout Example

TPS61086 SLVSA05_layout.gifFigure 26. TPS61086 Layout Example