The TPS6208x synchronous switched mode converters are based on DCS-Control™ (Direct Control with Seamless transition into Power Save Mode). This is an advanced regulation topology that combines the advantages of hysteretic, voltage and current mode control.
The DCS-Control topology operates in pulse width modulation (PWM) mode for medium to heavy load conditions and in Power Save Mode at light load currents. In PWM mode, the converter operates with its nominal switching frequency of 2 MHz having a controlled frequency variation over the input voltage range. As the load current decreases, the converter enters Power Save Mode, reducing the switching frequency and minimizing the IC quiescent current to achieve high efficiency over the entire load current range. DCS-Control supports both operation modes (PWM and PFM) using a single building block having a seamless transition from PWM to Power Save Mode without effects on the output voltage. Fixed output voltage versions provide smallest solution size combined with lowest no load current consumption. The TPS6208x offers both excellent DC voltage and superior load transient regulation, combined with very low output voltage ripple, minimizing interference with RF circuits.
The device is equipped with Snooze Mode functionality, which is enabled with the MODE pin. Snooze Mode supports high efficiency conversion at lowest output currents below 2 mA. If no load current is drawn, the ultra low quiescent current of 6.5 µA is sufficient to maintain the output voltage. This extends battery run time by reducing the quiescent current during lowest or no load conditions in battery-driven applications. For mains-operated voltage supplies, Snooze Mode reduces the system's stand-by energy consumption. During shutdown (EN = LOW), the device reduces energy consumption to less than 1 µA.
The TPS6208x has a power good output which goes low when the output voltage is below its nominal value. The power good is high impedance once the output is above 95% of the regulated voltage, and is driven to low once the output voltage falls below typically 90% of the regulated voltage. The PG pin is an open drain output and can sink up to 0.5 mA. The power good output requires a pull-up resistor. When the device is off due to disable, UVLO or thermal shutdown, the PG pin is high impedance (see Table 1). The PG signal can be used for sequencing of multiple rails by connecting to the EN pin of other converters. Leave the PG pin unconnected when not used.
|Device Information||PG Logic Status|
|Enable (EN=High)||VFB ≥ VPG||√|
|VFB ≤ VPG||√|
|UVLO||0.7V < VIN < VUVLO||√|
|Thermal Shutdown||TJ > TJSD||√|
|Power Supply Removal||VIN < 0.7V||√|
The device offers low input to output voltage difference by entering 100% duty cycle mode. In this mode, the high-side MOSFET switch is constantly turned on and the low-side MOSFET is switched off. This is particularly useful in battery powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range. The minimum input voltage to maintain an output voltage is calculated as:
The output gets discharged by the SW pin with a typical discharge resistor of RDIS whenever the device shuts down. This is the case when the device gets disabled by enable, thermal shutdown, or undervoltage lockout. The TPS6208A differs from the TPS62080 only in its stronger discharge.
When EN is set to start device operation, the device starts switching after a delay of about 40 μs and VOUT rises with a slope of about 10mV/μs (See Figure 27 andFigure 29 for typical startup operation). This avoids excessive inrush current and creates a smooth output voltage rise slope. It also prevents excessive voltage drops of primary cells and rechargeable batteries with high internal impedance.
If the output voltage is not reached within the soft start time, such as in the case of heavy load, the converter enters regular operation. Consequently, the inductor current limit operates as described below. The TPS6208x is able to start into a pre-biased output capacitor. The converter starts with the applied bias voltage and ramps up the output voltage to its nominal value.
To avoid mis-operation of the device at low input voltages, an undervoltage lockout is implemented that shuts down the device at voltages lower than VUVLO with a 120 mV typical hysteresis.
The device goes into thermal shutdown once the junction temperature exceeds typically TJSD. Once the device temperature falls below the threshold minus hysteresis, the device returns to normal operation automatically.
The Inductor Current Limit prevents the device from high inductor current and drawing excessive current from the battery or input voltage rail. Excessive current might occur with a shorted/saturated inductor or a heavy load/shorted output circuit condition.
The incorporated inductor peak current limit measures the current in the high-side and low-side power MOSFET. Once the high-side switch current limit is tripped, the high-side MOSFET is turned off and the low-side MOSFET is turned on to reduce the inductor current. When the inductor current drops down to the low-side switch current limit, the low-side MOSFET is turned off and the high-side switch is turned on again. This operation repeats until the inductor current does not reach the high-side switch current limit. Due to internal propagation delays, the real current limit value can exceed the static current limit in Electrical Characteristics.
The device is enabled by setting the EN input to a logic HIGH. Accordingly, a logic LOW disables the device. If the device is enabled, the internal power stage starts switching and regulates the output voltage to the programmed threshold. The EN input must be terminated and not left floating.
As the load current decreases, the TPS6208x enters Power Save Mode operation. During Power Save Mode, the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current maintaining high efficiency. Power Save Mode occurs when the inductor current becomes discontinuous. It is based on a fixed on time architecture. The typical on time is given by ton = 500 ns × (VOUT/VIN). The switching frequency over the whole load current range is shown in Figure 21 and Figure 22.
The TPS6208x offers a Snooze Mode function. If Snooze Mode is enabled by an external logic signal setting the MODE pin to HIGH, the device's quiescent current consumption is reduced to typically 6.5 µA. As a result, the high efficiency range is extended towards the range of lowest output currents below 2 mA. See the efficiency figures in Application Curves.
If the device is operating in Snooze Mode, a dedicated, low power consuming block monitors the output voltage. All other control blocks are snoozing during that time. If the output voltage falls below the programmed output voltage by 3.5% (typ), the control blocks wake up, regulate the output voltage and allow themselves to snooze again until the output voltage drops again. Snooze Mode operation provides a clear efficiency improvement at lowest output currents. If the load current increases, the advantage of efficiency in Snooze mode is reduced. Because the dynamic load regulation operates best if Snooze Mode is disabled, it is recommended to turn off Snooze Mode when the load current exceeds 2 mA. Generally, a microcontroller operates the MODE pin.