SLVSAQ5E
March 2012 – May 2017
TPS62125
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Undervoltage Lockout
7.3.2
Enable Comparator (EN / EN_hys)
7.3.3
Power Good Output and Output Discharge (PG)
7.3.4
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
Pulse Width Modulation (PWM) Operation
7.4.2
Power-Save Mode
7.4.3
100% Duty Cycle Low Dropout Operation
7.4.4
Soft-Start
7.4.5
Short-Circuit Protection
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Output Voltage Setting
8.2.2.2
Enable Threshold and Hysteresis Setting
8.2.2.3
Power Good (PG) Pullup and Output Discharge Resistor
8.2.2.4
Output Filter Design (Inductor and Output Capacitor)
8.2.2.5
Inductor Selection
8.2.2.6
Output Capacitor Selection
8.2.2.7
Input Capacitor Selection
8.2.3
Application Curves
8.3
System Examples
8.3.1
TPS62125 5-V Output Voltage Configuration
8.3.2
TPS62125 5-V VOUT
8.3.3
TPS62125 Operation From a Storage Capacitor Charged From a 0.5 mA Current Source
8.3.4
5 V to -5 V Inverter Configuration
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
Third-Party Products Disclaimer
11.2
Receiving Notification of Documentation Updates
11.3
Community Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DSG|8
MPDS308C
Thermal pad, mechanical data (Package|Pins)
DSG|8
QFND141I
Orderable Information
slvsaq5e_oa
slvsaq5e_pm