SLVSCL9A February   2016  – February 2016 TPS62480

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Enable / Shutdown (EN)
      2. 7.3.2  Soft Start (SS), Pre-biased Output
      3. 7.3.3  Tracking (TR)
      4. 7.3.4  Output Voltage Select (VSEL)
      5. 7.3.5  Forced PWM (MODE)
      6. 7.3.6  Power Good (PG)
      7. 7.3.7  Thermal Good (TG)
      8. 7.3.8  Active Output Discharge
      9. 7.3.9  Undervoltage Lockout (UVLO)
      10. 7.3.10 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pulse Width Modulation (PWM) Operation
      2. 7.4.2 Power Save Mode (PSM) Operation
      3. 7.4.3 Minimum Duty Cycle and 100% Mode Operation
      4. 7.4.4 Phase Shifted Operation
      5. 7.4.5 Phase Add/Shed and Current Balancing
      6. 7.4.6 Current Limit and Short Circuit Protection
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Setting the Adjustable Output Voltage
        2. 8.2.2.2 Setting VOUT2 Using the VSEL Feature
        3. 8.2.2.3 Output Filter Selection
        4. 8.2.2.4 Inductor Selection
        5. 8.2.2.5 Output Capacitor Selection
        6. 8.2.2.6 Input Capacitor Selection
        7. 8.2.2.7 Soft Start Capacitor Selection
        8. 8.2.2.8 Tracking
        9. 8.2.2.9 Current Sharing
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Third-Party Products Disclaimer
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

space

RNC Package
16-Pin (VQFN)
TPS62480 SLVSCL9_pinout.gif

space

space

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
PGND1 1 Power Ground Phase 1 (master)
SW1 2 Switch Node Phase 1 (master) , connected to the internal MOSFET switches
VIN1 3 Supply voltage Phase 1 (master)
EN 4 I Enable input (High=Enabled, Low = Disabled)
PG 5 O Power Good (open drain, requires pull-up resistor)
VSEL 6 I Output Voltage Select (High = VOUT2, Low=VOUT1) , VOUT1 < VOUT2
TG 7 O Thermal Good (open drain, requires pull-up resistor)
MODE 8 I Operating mode selection (Low=Automatic PWM/PSM, High = Forced PWM)
VIN2 9 Supply voltage Phase 2
SW2 10 Switch node Phase 2, connected to the internal MOSFET switches
PGND2 11 Power Ground Phase 2
SS/TR 12 O Soft-Start / Tracking. An external capacitor connected to this pin sets the output voltage rise time.
AGND 13 Analog Ground
FB 14 Output voltage feedback for the adjustable version. Connect resistive voltage divider to this pin.
RS 15 Resistor Select. Connect resistor that sets the level for the second output voltage here (activated by VSEL= High)
VO 16 VOUT detection (connect to VOUT, output discharge is internally connected to this pin)