SLVSBO6B January 2013 – July 2015 TPS65090
PRODUCTION DATA.

| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| POWER PATH CONTROL | |||
| ACG | A51 | O | Gate connection for AC adapter input switches |
| ACN | A50 | I | Shunt resistor sense connection for input current sensing |
| ACP | B47 | I | Shunt resistor sense connection for input current sensing |
| ACS | B48 | I | Source connection for AC adapter input switches |
| BATG | A2 | O | Gate connection for the battery switch |
| VAC | A13 | I | AC adapter supply input for charger control |
| VACS | A14 | I | AC adapter sense input for the charger |
| CHARGER | |||
| CBC | B2 | I | Bootstrap capacitor connection for charger step-down converter |
| ENC | A41 | I | Enable input for charger (1: enabled, 0: disabled), must be connected to a valid logic signal |
| FBC | A52 | I | Voltage feedback input for charger step-down converter. Must be connected to an external feedback divider to program charge voltage. |
| LC | A5, B4, B5 | O | Inductor connection for switched-mode battery charger step-down converter |
| PGNDC | A6, B6 | — | Power Ground |
| SRN | B1 | I | Shunt resistor connection for battery charge current sensing |
| SRP | A1 | I | Shunt resistor connection for battery charge current sensing |
| STAT | B13 | O | Charge status pin, open-drain (charge in progress, charge complete, sleep mode, fault) |
| TS1 | A24 | I | Temperature sensor input for temperature sensor 1 |
| TS2 | B23 | I | Temperature sensor input for temperature sensor 2 |
| VACG | A39 | O | VAC good pin, open drain (1, high impedance : voltage good; 0 : voltage not available) |
| VBAT | A15 | I | Battery sense connection |
| VBATG | A38 | O | VBAT good pin, open drain (1, high impedance : voltage good; 0 : voltage not available), pullup voltage should not be higher than voltage connected to |
| VREFT | A25 | I | Reference voltage output for temperature measurements |
| VSYSC | A3, A4, B3 | I | Switched-mode battery charger step-down converter supply voltage |
| VSYSG | B36 | O | VSYS good pin, open drain (1, high impedance : voltage good; 0 : voltage not available) |
| DCDC1 | |||
| CB1 | B44 | I | Bootstrap capacitor connection for DCDC1 |
| EN1 | B38 | I | Enable input for DCDC1 (1: enabled, 0: disabled), must be connected to a valid logic signal |
| FB1 | B37 | I | Output voltage sense input for DCDC1 |
| L1 | A45, B41, B42 | O | Inductor connection for DCDC1 step-down converter |
| PGND1 | A43, A44, B40 | — | Power Ground |
| VDCDC1 | A48 | I | Output voltage connection of DCDC1 |
| VSYS1 | A46, A47, B43 | I | Supply voltage input for DCDC1 step-down converter |
| DCDC2 | |||
| CB2 | B17 | I | Bootstrap capacitor connection for DCDC2 |
| EN2 | A42 | I | Enable input for DCDC2 (1: enabled, 0: disabled), must be connected to a valid logic signal |
| FB2 | B24 | I | Output voltage sense input for DCDC2 |
| L2 | A21, B19, B20 | O | Inductor connection for DCDC2 step-down converter |
| PGND2 | A22, A23, B21, B22 | — | Power Ground |
| VDCDC2 | A18 | I | Output voltage connection of DCDC2 |
| VSYS2 | A19, A20, B18 | I | Supply voltage input for DCDC2 step-down converter |
| DCDC3 | |||
| CB3 | A12 | I | Bootstrap capacitor connection for DCDC3 |
| EN3 | A26 | I | Enable input for DCDC3 (1: enabled, 0: disabled), must be connected to a valid logic signal |
| FB3 | B14 | I | Output voltage feedback input for DCDC3, a resistive feedback divider must be connected |
| L3 | A9, B8, B9 | O | Inductor connection for DCDC3 step-down converter |
| PGND3 | A7, A8, B7 | — | Power Ground |
| VDCDC3 | A16 | I | Output voltage sense input for DCDC3 |
| VSYS3 | A10, A11, B10, B11 | I | Supply voltage input for DCDC3 step-down converter |
| LDO1 | |||
| FB_L1 | B46 | I | Output voltage sense input for LDO1 |
| VLDO1 | B45 | O | Output of the LDO1 linear regulator |
| VSYS_L1 | A49 | I | Supply voltage input for LDO1 linear regulator |
| LDO2 | |||
| FB_L2 | B15 | I | Output voltage sense input for LDO2 |
| VLDO2 | B16 | O | Output of the LDO2 linear regulator |
| VSYS_L2 | A17 | I | Supply voltage input for LDO2 linear regulator |
| FET1 | |||
| INFET1 | B28 | I | Supply voltage input for load switch FET1, connect to GND, if not used |
| VFET1 | A30 | O | Output of load switch FET1, leave unconnected if not used |
| FET2 | |||
| INFET2 | B29 | I | Supply voltage input for load switch FET2, connect to GND, if not used |
| VFET2 | A31 | O | Output of load switch FET2, leave unconnected if not used |
| FET3 | |||
| INFET3 | A34, B31 | I | Supply voltage input for load switch FET3, connect to GND, if not used |
| VFET3 | A32, B30 | O | Output of load switch FET3, leave unconnected if not used |
| FET4 | |||
| INFET4 | B34 | I | Supply voltage input for load switch FET4, connect to GND, if not used |
| VFET4 | A37 | O | Output of load switch FET4, leave unconnected if not used |
| FET5 | |||
| INFET5 | B33 | I | Supply voltage input for load switch FET5, connect to GND, if not used |
| VFET5 | A36 | O | Output of load switch FET5, leave unconnected if not used |
| FET6 | |||
| INFET6 | B32 | I | Supply voltage input for load switch FET6, connect to GND, if not used |
| VFET6 | A35 | O | Output of load switch FET6, leave unconnected if not used |
| FET7 | |||
| INFET7 | B27 | I | Supply voltage input for load switch FET7, connect to GND, if not used |
| VFET7 | A29 | O | Output of load switch FET7, leave unconnected if not used |
| DIGITAL INTERFACE/CONTROL | |||
| AGND | A33 | — | Analog ground |
| GND | A40 | — | Logic ground |
| IRQ | B12 | O | Interrupt output, open drain, (1, high impedance : no interrupt; 0 : interrupt) details on events available through I2C |
| PGND | C1, C2, C3, C4 | — | Internally connected to PowerPAD™ |
| PowerPAD | — | Must be soldered to achieve appropriate power dissipation. Must be connected to PGND. | |
| SCL | B25 | I/O | Clock input for the I2C interface |
| SDA | A27 | I/O | Data line for the I2C interface |
| VCTRL | B39 | O | Internal control supply decoupling capacitor connection |
| VREF | B35 | O | Reference voltage decoupling capacitor connection |
| VREFADC | B26 | O | ADC reference voltage decoupling capacitor connection |