SLVS493D MARCH   2004  – January 2016 TPS65130 , TPS65131

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Conversion
      2. 7.3.2 Control
      3. 7.3.3 Enable
      4. 7.3.4 Load Disconnect
      5. 7.3.5 Soft-Start
      6. 7.3.6 Overvoltage Protection
      7. 7.3.7 Undervoltage Lockout
      8. 7.3.8 Overtemperature Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-Save Mode
      2. 7.4.2 Full Operation with VIN > 2.7 V
      3. 7.4.3 Limited Operation with VUVLO < VIN < 2.7 V
      4. 7.4.4 No Operation with VIN < VUVLO
  8. Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Programming the Output Voltage
          1. 8.2.2.1.1 Boost Converter
          2. 8.2.2.1.2 Inverting Converter
        2. 8.2.2.2 Inductor Selection
        3. 8.2.2.3 Capacitor Selection
          1. 8.2.2.3.1 Input Capacitor
          2. 8.2.2.3.2 Output Capacitors
        4. 8.2.2.4 Rectifier Diode Selection
        5. 8.2.2.5 External PMOS Selection
        6. 8.2.2.6 Stabilizing the Control Loop
          1. 8.2.2.6.1 Feedforward Capacitor
          2. 8.2.2.6.2 Compensation Capacitors
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
    2. 11.2 Related Links
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Applications and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TPS6513x boost converter output voltage, VPOS, and the inverting converter output voltage, VNEG, require external components to set the required output voltages. The valid output voltage ranges are as shown in Recommended Operating Conditions. The following sections show a typical application example with different output voltage settings and guidance for external component choices.

8.2 Typical Application

TPS65130 TPS65131 Application_Schematics.gif Figure 8. Typical Application Schematic With VPOS = 10.5 V, VNEG = –10 V

8.2.1 Design Requirements

Figure 8 uses the following parameters:

Table 1. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
Input voltage range 2.7 V to 5.5 V
Boost converter output voltage, VPOS R1 = 1 MΩ
R2 = 130kΩ
C9 = 6.8 pF
10.5 V
Inverting converter output voltage, VNEG R3 = 1 MΩ
R4 = 121.2 kΩ
C10 = 7.5 pF
–10 V

Table 2. List of Components

REFERENCE SETUP VALUE, DESCRIPTION
C1, C2 4.7 µF, ceramic, 6.3 V, X5R
C3 0.1 µF, ceramic, 10 V, X5R
C4, C5 4 x 4.7 µF, ceramic, 25 V, X7R
C6 10 nF, ceramic, 16 V, X7R
C7 4.7 nF, 50 V, C0G
C8 220 nF, ceramic, 6.3 V, X5R
R1 VPOS = 10.5 V 1 MΩ
VPOS = 15 V 975 kΩ
R2 VPOS = 10.5 V 130 kΩ
VPOS = 15 V 85.8 kΩ
R3 VNEG = –10 V 1 MΩ
VNEG = –15 V 1.3 MΩ
R4 VNEG = –10 V 121.2 kΩ
VNEG = –15 V 104.8 kΩ
R7 100 Ω
D1, D2 Schottky, 1 A, 20 V, Onsemi MBRM120
L1, L2 Wurth Elektronik 7447789004 (TPS65130), EPCOS B82462-G4472 (TPS65131)
Q1 MOSFET, P-channel, 12 V, 4 A, Vishay Si2323DS

8.2.2 Detailed Design Procedure

The TPS6513x DC-DC converter is intended for systems typically powered by a single-cell Li-ion or Li-polymer battery with a terminal voltage from 2.7 V up to 4.2 V. Because the recommended input voltage goes up to 5.5 V, the device is also suitable for 3-cell alkaline, NiCd, or NiMH batteries, as well as any regulated supply voltages from 2.7 V to 5.5 V. It provides two independent output voltage rails which are programmed as follows.

8.2.2.1 Programming the Output Voltage

8.2.2.1.1 Boost Converter

The output voltage of the TPS6513x boost converter stage can be adjusted with an external resistor divider connected to the FBP pin. The typical value of the voltage at the FBP pin is the reference voltage, which is 1.213 V. The maximum recommended output voltage at the boost converter is 15 V. To achieve appropriate accuracy, the current through the feedback divider should be about 100 times greater than the current into the FBP pin. Typical current into the FBP pin is 0.05 µA, and the voltage across R2 is 1.213 V. Based on those values, the recommended value for R2 should be lower than 200 kΩ to set the divider current at 5 µA or greater.

Calculate the value of resistor R1, as a function of the needed output voltage (VPOS), with Equation 1:

Equation 1. TPS65130 TPS65131 SLVSBB2D_equ1.gif

In this example, with R2 = 130 kΩ, choose R1 = 1 MΩ to set VPOS = 10.5 V.

8.2.2.1.2 Inverting Converter

The output voltage of the inverting converter stage can also be adjusted with an external resistor divider. It must be connected to the FBN pin. Unlike the feedback divider at the boost converter, the reference point of the feedback divider is not GND but VREF. So the typical value of the voltage at the FBN pin is 0 V. The minimum recommended output voltage at the inverting converter is –15 V. Feedback divider current considerations are similar to the considerations at the boost converter. For the same reasons, the feedback divider current should be in the range of 5 µA or greater. The voltage across R4 is 1.213 V. Based on those values, the recommended value for R4 should be lower than 200 kΩ to set the divider current at the required value.

Calculate the value of resistor R3, as a function of the needed output voltage (VNEG), with Equation 2:

Equation 2. TPS65130 TPS65131 SLVSBB2D_equ2.gif

In this example, with R4 = 121.2 kΩ, choose R3 = 1 MΩ to set VNEG = –10 V.

8.2.2.2 Inductor Selection

An inductive converter normally requires two main passive components for storing energy during the conversion. Therefore, each converter requires an inductor and a storage capacitor. In selecting the right inductor, TI recommends keeping the possible peak inductor current below the current limit threshold of the power switch in the chosen configuration. To select the right inductor, TI recommends keeping the possible peak inductor current below the current limit threshold of the power switch in the chosen configuration. For example, the current limit threshold of the switch for the boost converter and for the inverting converters is nominally 800 mA for the TPS65130 device and 1950 mA for TPS65131 device. The highest peak current through the switches and the inductor depend on the output load, the input voltage (VIN), and the output voltages (VPOS, VNEG). Use Equation 3 to estimate the peak inductor current in the boost converter, IL_P. Equation 4 shows the corresponding formula for the inverting converter, IL_N.

Equation 3. TPS65130 TPS65131 SLVSBB2D_equ3.gif
Equation 4. TPS65130 TPS65131 SLVSBB2D_equ4.gif

The second parameter for choosing the inductor is the desired current ripple in the inductor. Normally, it is advisable to work with a ripple of less than 20% of the average inductor current. A smaller ripple reduces the losses in the inductor, as well as output voltage ripple and EMI. But in the same way, output voltage regulation gets slower, causing greater voltage changes at fast load changes. In addition, a larger inductor usually increases the total system cost. Keep those parameters in mind and calculate the possible inductor value with Equation 5 for the boost converter and Equation 6 for the inverting converter.

Equation 5. TPS65130 TPS65131 SLVSBB2D_equ5.gif
Equation 6. TPS65130 TPS65131 SLVSBB2D_equ6.gif

Parameter f is the switching frequency. For the boost converter, ΔIL-P is the ripple current in the inductor, that is, 20% of IL-P. Accordingly, for the inverting converter, ΔIL-N is the ripple current in the inductor, that is, 20% of IL-N. VI is the input voltage, which is 3.3 V in this example. So, the calculated inductance value for the boost inductor is 5.1 μH and for the inverting converter inductor is 5.1 μH. With these calculated values and the calculated currents, it is possible to choose a suitable inductor.

In typical applications, the recommendation is to choose a 4.7-μH inductor. The device is optimized to work with inductance values from 3.3 μH to 6.8 μH. Nevertheless, operation with greater inductance values may be possible in some applications. Perform detailed stability analysis in this case. Be aware of the possibility that load transients and losses in the circuit can lead to higher currents than estimated in Equation 3 and Equation 4. Also, the losses caused by magnetic hysteresis and conductor resistance are a major parameter for total circuit efficiency.

Table 3 shows inductors from different suppliers used with the TPS6513x converter:

Table 3. List of Inductors

VENDOR INDUCTOR SERIES
EPCOS B8246284-G4
Wurth Elektronik 7447789XXX
744031XXX
TDK VLF3010
VLF4012
Cooper Electronics Technologies SD12

8.2.2.3 Capacitor Selection

8.2.2.3.1 Input Capacitor

As a recommendation, choose an input capacitors of at least 4.7 μF for the input of the boost converter (INP) and accordingly for the input of the inverting converter (INN). This improves transient behavior of the regulators and EMI behavior of the total power-supply circuit. Choose a ceramic capacitor or a tantalum capacitor. For the use of a tantalum capacitor, an additional, smaller ceramic capacitor (100 nF) in parallel is required. Place the input capacitor(s) close to the input pins..

8.2.2.3.2 Output Capacitors

One of the major parameters necessary to define the capacitance value of the output capacitor is the maximum allowed output voltage ripple of the converter. This ripple is determined by two parameters of the capacitor, the capacitance and the ESR. It is possible to calculate the minimum capacitance needed for the defined ripple, supposing that the ESR is zero. Use Equation 7 for the boost converter output capacitor (C4min) and Equation 8 for the inverting converter output capacitor (C5min).

Equation 7. TPS65130 TPS65131 SLVSBB2D_equ7.gif
Equation 8. TPS65130 TPS65131 SLVSBB2D_equ8.gif

The parameter f is the switching frequency. ΔVPOS and ΔVNEG are the maximum allowed ripple voltages for each converter. Choosing a ripple voltage in the range of 10 mV requires a minimum capacitance of 12 μF. The total ripple is larger due to the ESR of the output capacitor. Use Equation 9 for he boost converter and Equation 10 for the inverting converter to calculate this additional ripple component.

Equation 9. TPS65130 TPS65131 SLVSBB2D_equ9.gif
Equation 10. TPS65130 TPS65131 SLVSBB2D_equ10.gif

In this example, an additional ripple of 2 mV is the result of using a typical ceramic capacitor with an ESR in the 10-mΩ range. The total ripple is the sum of the ripple caused by the capacitance and the ripple caused by the ESR of the capacitor. In this example, the total ripple is 10 mV.

Load transients can create additional ripple. When the load current increases rapidly, the output capacitor must provide the additional current until the inductor current increases by the control loop which sets a higher ON-time (duty cycle) of the main switch. The higher duty cycle results in longer inductor charging periods. The inductance itself also limits the rate of increase of the inductor current. When the load current decreases rapidly, the output capacitor must store the excess energy (stored in the inductor) until the regulator has decreased the inductor current by reducing the duty cycle. TI recommends using greater capacitance values, as the foregoing calculations show.

8.2.2.4 Rectifier Diode Selection

Both converters (the boost and inverting converter) require rectifier diodes, D1 and D2. As a recommendation, to reduce losses, use Schottky diodes. The forward current rating needed is equal to the maximum output current. Consider that the maximum currents, IPOSmax and INEGmax, might differ for VPOS and VNEG when choosing the diodes.

8.2.2.5 External PMOS Selection

During shutdown, when connected to a power supply, a path from the power supply to the positive output conducts through the inductor and an external diode. Optionally, to fully disconnect the positive output VPOS during shutdown, add an external PMOS (Q1). The BSW pin controls the gate of the PMOS. When choosing a proper PMOS, the VGS and VGD voltage ratings must cover the input voltage range, the drain current rating must not be lower than the maximum input current flowing into the application, and conditions of the PMOS operating area must fit.

If there is no intention to use an external PMOS, leave the BSW pin floating.

8.2.2.6 Stabilizing the Control Loop

8.2.2.6.1 Feedforward Capacitor

As a recommendation, to speed up the control loop, place feedforward capacitors in the feedback divider, parallel to R1 (boost converter) and R3 (inverting converter). Equation 11 shows how to calculate the appropriate value for the boost converter, and Equation 12 for the inverting converter.

Equation 11. TPS65130 TPS65131 SLVSBB2D_equ11.gif
Equation 12. TPS65130 TPS65131 SLVSBB2D_equ12.gif

To avoid coupling noise into the control loop from the feedforward capacitors, the feedforward effect can be bandwith-limited by adding a series resistor. Any value from 10 kΩ to 100 kΩ is suitable. The greater the resistance, the lower the noise coupled into the control loop system.

8.2.2.6.2 Compensation Capacitors

The device features completely internally compensated control loops for both converters. The internal feedforward system has built-in error correction which requires external capacitors. As a recommendation, use a 10-nF capacitor at the CP pin of the boost converter and a 4.7-nF capacitor at the CN pin of the inverting converter.

8.2.3 Application Curves

TPS65130 TPS65131 tc_eff_io_lvs493.gif Figure 9. TPS65130 Efficiency vs Output Current
TPS65130 TPS65131 tc_eff2_io_lvs493.gif Figure 11. TPS65130 Efficiency vs Output Current
TPS65130 TPS65131 tc_eff3_io_lvs493.gif Figure 13. TPS65130 Efficiency vs Output Current
TPS65130 TPS65131 tc_eff4_io_lvs493.gif Figure 15. TPS65130 Efficiency vs Output Current
TPS65130 TPS65131 tc_eff5_io_lvs493.gif Figure 17. TPS65130 Efficiency vs Output Current
TPS65130 TPS65131 tc_eff6_io_lvs493.gif Figure 19. TPS65130 Efficiency vs Output Current
TPS65130 TPS65131 tc_eff_vi_lvs493.gif Figure 21. TPS65130 Efficiency vs Input Voltage
TPS65130 TPS65131 tc_eff_vi3_lvs493.gif Figure 23. TPS65130 Efficiency vs Input Voltage
TPS65130 TPS65131 tc_eff_vi5_lvs493.gif Figure 25. TPS65130 Efficiency vs Input Voltage
TPS65130 TPS65131 tc_eff7_io_lvs493.gif Figure 27. TPS65130 Combined Efficiency vs Output Current
TPS65130 TPS65131 tc_eff_vi7_lvs493.gif Figure 29. TPS65130 Combined Efficiency vs Input Voltage
TPS65130 TPS65131 tc1_vo_io_lvs493.gif Figure 31. TPS65131 Output Voltage vs Output Current
TPS65130 TPS65131 tc1_vo2_io_lvs493.gif Figure 33. TPS65131 Output Voltage vs Output Current
TPS65130 TPS65131 tc1_vo3_io_lvs493.gif Figure 35. TPS65131 Output Voltage vs Output Current
TPS65130 TPS65131 tc1_vo4_io_lvs493.gif Figure 37. TPS65131 Output Voltage vs Output Current
TPS65130 TPS65131 tc1_vo5_io_lvs493.gif Figure 39. TPS65131 Output Voltage vs Output Current
TPS65130 TPS65131 tc1_vo6_io_lvs493.gif Figure 41. TPS65131 Output Voltage vs Output Current
TPS65130 TPS65131 tc_neg_vo_lvs493.png Figure 43. VNEG in Continuous Current Mode
TPS65130 TPS65131 tc_neg_pwm_lvs493.png Figure 45. VNEG at Power-Save Mode Disabled
TPS65130 TPS65131 tc_vo_psm2_lvs493.png Figure 47. VNEG in Power-Save Mode
TPS65130 TPS65131 tc_ltr2_lvs493.png Figure 49. Load Transient Response
TPS65130 TPS65131 tc_line_res_lvs493.png Figure 51. Line Transient Response
TPS65130 TPS65131 tc_startup2_lvs493.png Figure 53. Start-up After Enable
TPS65130 TPS65131 tc1_eff_io_lvs493.gif Figure 10. TPS65131 Efficiency vs Output Current
TPS65130 TPS65131 tc1_eff2_io_lvs493.gif Figure 12. TPS65131 Efficiency vs Output Current
TPS65130 TPS65131 tc1_eff3_io_lvs493.gif Figure 14. TPS65131 Efficiency vs Output Current
TPS65130 TPS65131 tc1_eff4_io_lvs493.gif Figure 16. TPS65131 Efficiency vs Output Current
TPS65130 TPS65131 tc1_eff5_io_lvs493.gif Figure 18. TPS65131 Efficiency vs Output Current
TPS65130 TPS65131 tc1_eff6_io_lvs493.gif Figure 20. TPS65131 Efficiency vs Output Current
TPS65130 TPS65131 tc_eff_vi2_lvs493.gif Figure 22. TPS65130 Efficiency vs Input Voltage
TPS65130 TPS65131 tc_eff_vi4_lvs493.gif Figure 24. TPS65130 Efficiency vs Input Voltage
TPS65130 TPS65131 tc_eff_vi6_lvs493.gif Figure 26. TPS65130 Efficiency vs Input Voltage
TPS65130 TPS65131 tc1_eff7_io_lvs493.gif Figure 28. TPS65131 Combined Efficiency vs Output Current
TPS65130 TPS65131 tc_vo_io_lvs493.gif Figure 30. TPS65130 Output Voltage vs Output Current
TPS65130 TPS65131 tc_vo2_io_lvs493.gif Figure 32. TPS65130 Output Voltage vs Output Current
TPS65130 TPS65131 tc_vo3_io_lvs493.gif Figure 34. TPS65130 Output Voltage vs Output Current
TPS65130 TPS65131 tc_vo4_io_lvs493.gif Figure 36. TPS65130 Output Voltage vs Output Current
TPS65130 TPS65131 tc_vo5_io_lvs493.gif Figure 38. TPS65130 Output Voltage vs Output Current
TPS65130 TPS65131 tc_vo6_io_lvs493.gif Figure 40. TPS65130 Output Voltage vs Output Current
TPS65130 TPS65131 tc_pos_vo_lvs493.png Figure 42. VPOS in Continuous Current Mode
TPS65130 TPS65131 tc_pos_pwm_lvs493.png Figure 44. VPOS at Power-Save Mode Disabled
TPS65130 TPS65131 tc_vo_psm_lvs493.png Figure 46. VPOS in Power-Save Mode
TPS65130 TPS65131 tc_ltr_lvs493.png Figure 48. Load Transient Response
TPS65130 TPS65131 tc_ltr3_lvs493.png Figure 50. Line Transient Response
TPS65130 TPS65131 tc_startup_lvs493.png Figure 52. Start-up After Enable