SWCS106F
March 2013 – July 2016
TPS659119-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Characteristics
7.5
External Component Recommendation
7.6
I/O Pullup and Pulldown Characteristics
7.7
Digital I/O Voltage Electrical Characteristics
7.8
I2C Interface and Control Signals
7.9
Switching Characteristics—I2C Interface and Control Signals
7.10
Power Consumption
7.11
Power References and Thresholds
7.12
Thermal Monitoring and Shutdown
7.13
32-kHz RTC Clock
7.14
VRTC LDO
7.15
VIO SMPS
7.16
VDD1 SMPS
7.17
VDD2 SMPS
7.18
EXTCTRL
7.19
LDO1 AND LDO2
7.20
LDO3 and LDO4
7.21
LDO5
7.22
LDO6 and LDO7
7.23
LDO8
7.24
Timing Requirements for Boot Sequence Example
7.25
Power Control Timing Requirements
7.26
Device SLEEP State Control Timing Requirements
7.27
Supplies State Control Through EN1 and EN2 Timing Characteristics
7.28
VDD1 Supply Voltage Control Through EN1 Timing Requirements
7.29
Typical Characteristics
7.29.1
VIO SMPS Curves
7.29.2
VDD1 SMPS Curves
7.29.3
VDD2 SMPS Curves
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Power Reference
8.3.2
Power Resources
8.3.3
PWM and LED Generators
8.3.4
Dynamic-Voltage Frequency Scaling and Adaptive-Voltage Scaling Operation
8.3.5
32-kHz RTC Clock
8.3.6
Real-Time Clock (RTC)
8.3.7
Thermal Monitoring and Shutdown
8.3.8
Crystal Oscillator Power-On Reset
8.4
Device Functional Modes
8.4.1
Embedded Power Controller
8.4.1.1
State-Machine
8.4.1.1.1
Device POWER-ON Enable Conditions
8.4.1.1.2
Device POWER ON Disable Conditions
8.4.1.1.3
Device SLEEP Enable Conditions
8.4.1.1.4
Device Reset Scenarios
8.4.1.2
Boot Configuration and Switch-On and Switch-Off Sequences
8.4.1.3
Control Signals
8.4.1.3.1
SLEEP
8.4.1.3.2
PWRHOLD
8.4.1.3.3
BOOT1
8.4.1.3.4
NRESPWRON, NRESPWRON2
8.4.1.3.5
CLK32KOUT
8.4.1.3.6
PWRON
8.4.1.3.7
INT1
8.4.1.3.8
EN2 and EN1
8.4.1.3.9
GPIO0-8
8.4.1.3.10
HDRST Input
8.4.1.3.11
PWRDN
8.4.1.3.12
Watchdog
8.4.1.3.13
Tracking LDO
8.5
Programming
8.5.1
Time-Calendar Registers
8.5.2
General Registers
8.5.3
Compensation Registers
8.5.4
Backup Registers
8.5.5
I2C Interface
8.5.5.1
Addressing
8.5.5.2
Access Protocols
8.5.5.2.1
Single-Byte Access
8.5.5.2.2
Multiple-Byte Access To Several Adjacent Registers
8.5.6
Interrupts
8.6
Register Maps
8.6.1
Functional Registers
8.6.2
TPS659119-Q1_FUNC_REG Register Mapping Summary
8.6.3
TPS659119-Q1_FUNC_REG Register Descriptions
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Step-down Converter Input Capacitors
9.2.2.2
Step-down Converter Output Capacitors
9.2.2.3
Step-down Converter Inductors
9.2.2.4
LDO Input Capacitors
9.2.2.5
LDO Output Capacitors
9.2.2.6
VCC7
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Device Nomenclature
12.2
Receiving Notification of Documentation Updates
12.3
Community Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PFP|80
MPQF049B
Thermal pad, mechanical data (Package|Pins)
PFP|80
PPTD162E
Orderable Information
swcs106f_oa
swcs106f_pm