SBVS204G June   2012  – May 2026

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Handling Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Internal Current Limit (ICL)
      2. 6.3.2 Enable (EN) And Under-Voltage Lockout (UVLO)
      3. 6.3.3 Soft-Start And Inrush Current
    4. 6.4 Device Functional Modes
    5. 6.5 Programming
      1. 6.5.1 ANY-OUT Programmable Output Voltage
      2. 6.5.2 Adjustable Operation (TPS7A4701 Only)
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Capacitor Recommendations
          1. 7.2.2.1.1 Input and Output Capacitor Requirements
          2. 7.2.2.1.2 Noise Reduction Capacitor (CNR)
        2. 7.2.2.2 Dropout Voltage (VDO)
        3. 7.2.2.3 Output Voltage Accuracy
        4. 7.2.2.4 Startup
        5. 7.2.2.5 AC Performance
          1. 7.2.2.5.1 Power-Supply Rejection Ratio (PSRR)
          2. 7.2.2.5.2 Load Step Transient Response
          3. 7.2.2.5.3 Noise
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
    1. 8.1 Power Dissipation (PD)
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
    3. 9.3 Thermal Protection
    4. 9.4 Estimating Junction Temperature
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Trademarks
    3. 10.3 Electrostatic Discharge Caution
    4. 10.4 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.4 Estimating Junction Temperature

JEDEC standards now recommend the use of PSI thermal metrics to estimate the junction temperatures of the LDO while in-circuit on a typical PCB board application. These metrics are not strictly speaking thermal resistances, but rather offer practical and relative means of estimating junction temperatures. These PSI metrics are determined to be significantly independent of copper-spreading area. The key thermal metrics (ΨJT and ΨJB) are given in the Section 5.4 table and are used in accordance with Equation 9.

Equation 9. TPS7A4700 TPS7A4701

where:

  • PD is the power dissipated as explained in Equation 7,
  • TT is the temperature at the center-top of the device package, and
  • TB is the PCB surface temperature measured 1 mm from the device package and centered on the package edge