SLVSCE8C January   2015  – September 2018 TPS7B7701-Q1 , TPS7B7702-Q1

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Application Diagram
  4. Revision History
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fault Detection and Protection
      2. 7.3.2  Short-Circuit and Overcurrent Protection
      3. 7.3.3  Short-to-Battery and Reverse Current Detection
      4. 7.3.4  Thermal Shutdown
      5. 7.3.5  Integrated Reverse-Polarity Protection
      6. 7.3.6  Integrated Inductive Clamp
      7. 7.3.7  Undervoltage Lockout
      8. 7.3.8  Enable (EN, EN1, and EN2)
      9. 7.3.9  Internal Voltage Regulator (VCC)
      10. 7.3.10 Current Sense Multiplexing
      11. 7.3.11 Adjustable Output Voltage (FB, FB1, and FB2)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With IN < 4.5 V
      2. 7.4.2 Operation With EN Control
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor
        2. 8.2.2.2 Output Capacitor
        3. 8.2.2.3 Current Sense Resistor Selection
        4. 8.2.2.4 Current-Limit Resistor Selection
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Pin Configuration and Functions

Single-Channel TPS7B7701-Q1 PWP Package
16-Pin HTSSOP With PowerPAD
Top View
Dual-Channel TPS7B7702-Q1 PWP Package
16-Pin HTSSOP With PowerPAD
Top View

Pin Functions

PIN TYPE DESCRIPTION
NAME SINGLE-CHANNEL DUAL-CHANNEL
EN 2 Input Active-high enable input for the OUT pin with internal pulldown.
EN1 2 Input Active-high enable input for the OUT1 pin with internal pulldown.
EN2 3 Input Active-high enable input for the OUT2 pin with internal pulldown.
ERR 9 9 Output This pin is an open-drain fault indicator for general faults.
FB 15 Input Feedback input for setting OUT voltage. Connect FB to GND for current-limited switch operation.
FB1 15 Input Feedback input for setting OUT1 voltage. Connect FB1 to GND for current-limited switch operation.
FB2 13 Input Feedback input for setting OUT2 voltage. Connect FB2 to GND for current-limited switch operation.
GND 12 12 Ground Ground reference
IN 1 1 Power Input power-supply voltage
LIM 10 Output Programmable current-limit pin. Connect a resistor to GND to set the current limitation level. This pin does not need an external capacitor. To set to internal current limit, short this pin to GND.
LIM1 10 Output Programmable current-limit pin for channel 1. Connect a resistor to GND to set the current limitation level for channel 1. This pin does not need an external capacitor. To set to internal current limit, short this pin to GND.
LIM2 11 Output Programmable current-limit pin for channel 2. Connect a resistor to GND to set the current limitation level for channel 2. This pin does not need an external capacitor. To set to internal current limit, short this pin to GND.
NC 3, 13, 14 Not connected. Connect the NC pins to ground or leave floating.
6, 7, 11 Internally connected. These pins must either be floated or connected to GND.
OUT 16 Power Output voltage
OUT1 16 Power Output voltage 1
OUT2 14 Power Output voltage 2
SENSE 5 Output Output of current sense for sensing. To set the SENSE output voltage level, connect a resistor between this pin and GND. In addition, connect a 1-µF capacitor from this pin to GND for frequency compensation of the current-sense loop. Short this pin to GND if not used.
SENSE1 5 Output Output of current sense for sensing. SENSE1 current is proportional to the current flow through OUT1 and SENSE 2 current is proportional to OUT2 current when SENSE_SEL and SENSE_EN are low. To set the SENSEx output voltage level, connect a resistor between this pin and GND. In addition, connect a 1-µF capacitor from the SENSEx pin to GND for frequency compensation of the current-sense loop. Short the SENSEx pin to GND if not used.
SENSE2 6 Output
SENSE_EN 8 8 Input This pin is the enable and disable of the current-sense pin for multiplexing, active-low enable.
SENSE_SEL 7 Input This pin selects the current sense between channel 1 and channel 2. See Table 2 for details.
VCC 4 4 Output Internal 4.5-V regulator. Connect 1-μF ceramic capacitor between VCC and GND for frequency compensation.