SLVSCE8C January   2015  – September 2018 TPS7B7701-Q1 , TPS7B7702-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Application Diagram
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fault Detection and Protection
      2. 7.3.2  Short-Circuit and Overcurrent Protection
      3. 7.3.3  Short-to-Battery and Reverse Current Detection
      4. 7.3.4  Thermal Shutdown
      5. 7.3.5  Integrated Reverse-Polarity Protection
      6. 7.3.6  Integrated Inductive Clamp
      7. 7.3.7  Undervoltage Lockout
      8. 7.3.8  Enable (EN, EN1, and EN2)
      9. 7.3.9  Internal Voltage Regulator (VCC)
      10. 7.3.10 Current Sense Multiplexing
      11. 7.3.11 Adjustable Output Voltage (FB, FB1, and FB2)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With IN < 4.5 V
      2. 7.4.2 Operation With EN Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitor
        2. 8.2.2.2 Output Capacitor
        3. 8.2.2.3 Current Sense Resistor Selection
        4. 8.2.2.4 Current-Limit Resistor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Related Links
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Community Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PWP|16
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.7 Undervoltage Lockout

The device includes an undervoltage lockout (UVLO) threshold that is internally fixed. The undervoltage lockout activates when the input voltage on the IN pin drops below V(UVLO). The UVLO makes sure that the regulator is not latched into an unknown state during low input-supply voltage. If the input voltage has a negative transient that drops below the UVLO threshold and then recovers, the regulator shuts down and powers up with a normal power-up sequence when the input voltage is above the required levels.

Table 1. Fault Table

FAILURE MODE V(SENSE) ERR LDO SWITCH OUTPUT LATCHED
Open load TPS7B7701-Q1 TPS7B7702-Q1 eq_01_slvsce8.gif HIGH Enabled No
Normal HIGH Enabled No
Overcurrent HIGH Enabled No
Short-circuit or current limit 2.4 to 2.65 V LOW Enabled No
Thermal shutdown 2.7 to 3 V LOW Disabled No
Output short-to-battery 3.05 to 3.3 V LOW Disabled Yes
Reverse current 3.05 to 3.3 V LOW Disabled Yes