SLVSEN7A April   2020  – November 2020 TPS7H4001-SP

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Quality Conformance Inspection
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  VIN and Power VIN Pins (VIN and PVIN)
      2. 7.3.2  Voltage Reference
      3. 7.3.3  Adjusting the Output Voltage
      4. 7.3.4  Safe Start-Up Into Prebiased Outputs
      5. 7.3.5  Error Amplifier
      6. 7.3.6  Enable and Adjust UVLO
      7. 7.3.7  Adjustable Switching Frequency and Synchronization (SYNC)
        1. 7.3.7.1 Internal Oscillator Mode
        2. 7.3.7.2 External Synchronization Mode
        3. 7.3.7.3 Primary-Secondary Operation Mode
      8. 7.3.8  Soft-Start (SS/TR)
      9. 7.3.9  Power Good (PWRGD)
      10. 7.3.10 Sequencing
      11. 7.3.11 Output Overvoltage Protection (OVP)
      12. 7.3.12 Overcurrent Protection
        1. 7.3.12.1 High-Side MOSFET Overcurrent Protection
        2. 7.3.12.2 Low-Side MOSFET Overcurrent Protection
      13. 7.3.13 Thermal Shutdown
      14. 7.3.14 Turn-On Behavior
      15. 7.3.15 Slope Compensation
        1. 7.3.15.1 Slope Compensation Requirements
      16. 7.3.16 Small Signal Model for Frequency Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Fixed-Frequency PWM Control
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Operating Frequency
        2. 8.2.2.2 Output Inductor Selection
        3. 8.2.2.3 Output Capacitor Selection
        4. 8.2.2.4 Input Capacitor Selection
        5. 8.2.2.5 Soft-Start Capacitor Selection
        6. 8.2.2.6 Undervoltage Lockout (UVLO) Set Point
        7. 8.2.2.7 Output Voltage Feedback Resistor Selection
          1. 8.2.2.7.1 Minimum Output Voltage
        8. 8.2.2.8 Compensation Component Selection
      3. 8.2.3 Parallel Operation
      4. 8.2.4 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • HKY|34
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • Radiation performance:
    • Radiation-hardness-assured up to
      TID 100 krad(Si)
    • SEL, SEB, and SEGR immune to
      LET = 75 MeV-cm2/mg
    • SET and SEFI characterized up to
      LET = 75 MeV-cm2/mg
  • Peak efficiency: 95.5% (VO = 1 V at 100 kHz)
  • Integrated 22-mΩ and 17-mΩ MOSFETs
  • Power rail: 3 V to 7 V on VIN
  • Flexible switching frequency options:
    • 100-kHz to 1-MHz adjustable internal oscillator
    • External sync capability: 100-kHz to 1-MHz
    • SYNC pins can be configured as 500-kHz clocks at 90° out of phase to parallel up to
      4 devices
  • 0.6-V ±1.5% voltage reference over temperature, radiation, and line and load regulation
  • Monotonic start-up into prebiased outputs
  • Adjustable slope compensation and soft-start
  • Adjustable input enable and power-good output for power sequencing
  • Power-good output monitor for undervoltage and overvoltage
  • 34-pin, thermally-enhanced ceramic flatpack package (HKY) for space applications
GUID-E1D02CFD-686D-45DE-9932-FB525E3BB596-low.gif Functional Diagram