SLVSCY5F February   2016  – January 2023 TPS82130

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommend Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 PWM and PSM Operation
      2. 7.3.2 Low Dropout Operation (100% Duty Cycle)
      3. 7.3.3 Switch Current Limit
      4. 7.3.4 Undervoltage Lockout
      5. 7.3.5 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Enable and Disable (EN)
      2. 7.4.2 Soft Start-Up (SS/TR)
      3. 7.4.3 Voltage Tracking (SS/TR)
      4. 7.4.4 Power-Good Output (PG)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 1.8-V Output Application
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design with WEBENCH® Tools
          2. 8.2.1.2.2 Setting the Output Voltage
          3. 8.2.1.2.3 Input and Output Capacitor Selection
          4. 8.2.1.2.4 Soft Start-Up Capacitor Selection
        3. 8.2.1.3 Application Performance Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
      3. 8.4.3 Thermal Consideration
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Third-Party Products Disclaimer
        2. 9.1.1.2 Custom Design with WEBENCH® Tools
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Glossary
    7. 9.7 Electrostatic Discharge Caution
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • SIL|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

TJ = –40°C to 125°C and VIN = 3.0 V to 17 V. Typical values are at TJ = 25°C and VIN = 12 V, unless otherwise noted.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
SUPPLY
IQQuiescent current into VINNo load, device not switching2035µA
ISDShutdown current into VINEN = Low1.57.4µA
VUVLOUndervoltage lockout thresholdVIN falling2.62.72.8V
VIN rising2.82.93.0V
TJSDThermal shutdown thresholdTJ rising160°C
TJ falling140°C
LOGIC INTERFACE (EN)
VIHHigh-level input voltage0.90.65V
VILLow-level input voltage0.450.3V
Ilkg(EN)Input leakage current into the EN pinEN = High0.011µA
CONTROL (SS/TR, PG)
ISS/TRSS/TR pin source current2.12.52.8µA
VPGPower-good thresholdVOUT rising, referenced to VOUT nominal92%95%99%
VOUT falling, referenced to VOUT nominal87%90%94%
VPG,OLPower-good low-level voltageIsink = 2 mA0.10.3V
Ilkg(PG)Input leakage current into the PG pinVPG = 1.8 V1400nA
OUTPUT
VFBFeedback regulation voltagePWM mode785800815mV
TJ = 0°C to 85°C788800812
PSMCOUT = 22 µF785800823
COUT = 2 × 22 µF, TJ = 0°C to 85°C788800815
Ilkg(FB)Feedback input leakage currentVFB = 0.8 V1100nA
Line regulationIOUT = 1 A, VOUT = 1.8 V0.002%/V
Load regulationIOUT = 0.5 A to 3 A, VOUT = 1.8 V0.12%/A
POWER SWITCH
RDS(on)High-side FET on-resistanceISW = 500 mA, VIN ≥ 6 V90170mΩ
ISW = 500 mA, VIN = 3 V120
Low-side FET on-resistanceISW = 500 mA, VIN ≥ 6 V4070
ISW = 500 mA, VIN = 3 V50
RDPDropout resistance100% mode, VIN ≥ 6 V125mΩ
100% mode, VIN = 3 V160
ILIMFHigh-side FET switch current limitVIN = 6 V, TA = 25°C3.64.24.9A
fSWPWM switching frequencyIOUT = 1 A, VOUT = 1.8 V2.0MHz