SLUSDN6A September   2019  – December 2020 TPSM82810 , TPSM82813

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Schematic
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Precise Enable (EN)
      2. 9.3.2 Output Discharge
      3. 9.3.3 COMP/FSET
      4. 9.3.4 MODE/SYNC
      5. 9.3.5 Spread Spectrum Clocking (SSC) - TPSM8281xS
      6. 9.3.6 Undervoltage Lockout (UVLO)
      7. 9.3.7 Power-Good Output (PG)
      8. 9.3.8 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Pulse Width Modulation (PWM) Operation
      2. 9.4.2 Power Save Mode Operation (PFM/PWM)
      3. 9.4.3 100% Duty-Cycle Operation
      4. 9.4.4 Current Limit and Short Circuit Protection
      5. 9.4.5 Soft Start / Tracking (SS/TR)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Programming the Output Voltage
        2. 10.2.2.2 Feedforward capacitor
        3. 10.2.2.3 Input Capacitor
        4. 10.2.2.4 Output Capacitor
        5. 10.2.2.5 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Voltage Tracking
      2. 10.3.2 Synchronizing to an External Clock
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
      1. 12.2.1 Thermal Consideration
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

GUID-20201118-CA0I-WLNS-JQD2-VHMDVMRBXLDS-low.svgFigure 6-1 14-pin μSiL Package (Top View)
Table 6-1 Pin Functions
PINI/ODESCRIPTION
NAMENO.
EN2IThis is the enable pin of the device. Connect to logic low to disable the device. Pull high to enable the device. Do not leave this pin unconnected.
FB7IVoltage feedback input. Connect the output voltage resistor divider to this pin.
GND6, 10, 13, 14Ground pin
MODE/SYNC4IThe device runs in PFM/PWM mode when this pin is pulled low. When the pin is pulled high, the device runs in forced PWM mode. Do not leave this pin unconnected. The MODE/SYNC pin can also be used to synchronize the device to an external frequency. See Section 10.3.2.
COMP/FSET9IDevice compensation and frequency set input. A resistor from this pin to GND defines the compensation of the control loop as well as the switching frequency if not externally synchronized. The switching frequency is set to 2.25 MHz if the pin is tied to GND or VIN. See Table 9-1. Do not leave this pin unconnected.
PG3OOpen-drain power-good output with window comparator. This pin is pulled to GND while VOUT is outside the power-good threshold. It can be left open or tied to GND if not used. A pullup resistor can be connected to any voltage not larger than VIN.
SS/TR8ISoft-start/tracking pin. A capacitor connected from this pin to GND defines the output voltage rise time. The pin can also be used as an input for tracking and sequencing - see Section 10.3.1.
VOUT5Output voltage pin. This pin is internally connected to the integrated inductor.
VIN1, 11, 12Power supply input. Connect the input capacitor as close as possible between the VIN and GND pins.