SLUSDN6A September   2019  – December 2020 TPSM82810 , TPSM82813

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Schematic
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Precise Enable (EN)
      2. 9.3.2 Output Discharge
      3. 9.3.3 COMP/FSET
      4. 9.3.4 MODE/SYNC
      5. 9.3.5 Spread Spectrum Clocking (SSC) - TPSM8281xS
      6. 9.3.6 Undervoltage Lockout (UVLO)
      7. 9.3.7 Power-Good Output (PG)
      8. 9.3.8 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 Pulse Width Modulation (PWM) Operation
      2. 9.4.2 Power Save Mode Operation (PFM/PWM)
      3. 9.4.3 100% Duty-Cycle Operation
      4. 9.4.4 Current Limit and Short Circuit Protection
      5. 9.4.5 Soft Start / Tracking (SS/TR)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Programming the Output Voltage
        2. 10.2.2.2 Feedforward capacitor
        3. 10.2.2.3 Input Capacitor
        4. 10.2.2.4 Output Capacitor
        5. 10.2.2.5 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Voltage Tracking
      2. 10.3.2 Synchronizing to an External Clock
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
      1. 12.2.1 Thermal Consideration
  13. 13Device and Documentation Support
    1. 13.1 Device Support
      1. 13.1.1 Third-Party Products Disclaimer
    2. 13.2 Documentation Support
      1. 13.2.1 Related Documentation
    3. 13.3 Receiving Notification of Documentation Updates
    4. 13.4 Support Resources
    5. 13.5 Trademarks
    6. 13.6 Electrostatic Discharge Caution
    7. 13.7 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3.3 COMP/FSET

This pin sets two different parameters independently:

  • Internal compensation settings for the control loop (three settings available)
  • The switching frequency in PWM mode from 1.8 MHz to 4 MHz

A resistor from COMP/FSET to GND changes the compensation as well as the switching frequency. The change in compensation adapts the device to different values of output capacitance. The resistor must be placed close to the pin to keep the parasitic capacitance on the pin to a minimum. The compensation setting is set after enabling the converter, so a change in the resistor during operation only has an effect on the switching frequency but not on the compensation.

To save external components, the pin can also be directly tied to VIN or GND to set a pre-defined switching frequency and compensation. Do not leave the pin floating.

The switching frequency must be selected based on the maximum input voltage and the output voltage to meet the specifications for the minimum on-time. Using VIN = 5.5 V and VOUT = 1.1 V as an example, the minimum duty cycle given with Equation 1 is 0.2, which results in a maximum switching frequency of 2.67 MHz according to Equation 2.

Equation 1. GUID-44F7FB5D-5354-4236-84B1-2D4D38FB7522-low.gif
Equation 2. GUID-D7E2D0C6-8038-4487-8BFA-A5E66446C172-low.gif

The compensation range has to be chosen based on the minimum effective capacitance used. The capacitance can be increased from the minimum value as given in Table 9-1 up to the maximum of 470 µF in all of the three compensation ranges. If the capacitance of an output changes during operation, for example, when load switches are used to connect or disconnect parts of the circuitry, the compensation has to be chosen for the minimum capacitance on the output. With large output capacitance, the compensation must be done based on that large capacitance to get the best load transient response. Compensating for large output capacitance but placing less capacitance on the output can lead to instability.

The switching frequency for the different compensation setting is determined by the following equations.

For compensation (comp) setting 1:

Equation 3. GUID-87E8D8EF-70B9-40DF-A2AB-0A009A503AAA-low.gif

For compensation (comp) setting 2:

Equation 4. GUID-D69766D3-BAED-4E10-BDB4-03775B7F30ED-low.gif

For compensation (comp) setting 3:

Equation 5. GUID-94DE9EE3-AE2E-4BEA-9C6B-A7D47F070FB3-low.gif
Table 9-1 Switching Frequency and Compensation
COMPENSATIONRCFSWITCHING FREQUENCYMINIMUM OUTPUT CAPACITANCE FOR VOUT < 1 VMINIMUM OUTPUT CAPACITANCE FOR 1 V ≤ VOUT < 3.3 VMINIMUM OUTPUT CAPACITANCE FOR VOUT ≥ 3.3 V
for smallest output capacitance
(comp setting 1)		10 kΩ ... 4.5 kΩ1.8 MHz (10 kΩ) ... 4 MHz (4.5 kΩ) according to Equation 353 µF32 µF27 µF
for medium output capacitance
(comp setting 2)		33 kΩ ... 15 kΩ1.8 MHz (33 kΩ) ... 4 MHz (15 kΩ) according to Equation 4100 µF60 µF50 µF
for large output capacitance
(comp setting 3)		100 kΩ ... 45 kΩ1.8 MHz (100 kΩ) ... 4 MHz (45 kΩ) according to Equation 5200 µF120 µF100 µF
for smallest output capacitance
(comp setting 1)		tied to GNDinternally fixed 2.25 MHz53 µF32 µF27 µF
for large output capacitance
(comp setting 3)		tied to VINinternally fixed 2.25 MHz200 µF120 µF100 µF

Refer to Section 10.2.2.4 for further details on the output capacitance required depending on the output voltage. All values are the effective value of capacitance.

A too high resistor value for RCF is read as "tied to VIN", and a value below the lowest range as "tied to GND". The minimum output capacitance in Table 9-1 is for capacitors close to the output of the device. If the capacitance is distributed, a lower compensation setting can be required.