SLUSEF1B September   2021  – November 2022 TPSM82864A , TPSM82866A

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Options
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Power Save Mode
      2. 8.3.2 Forced PWM Mode
      3. 8.3.3 Optimized Transient Performance from PWM to PSM Operation
      4. 8.3.4 Low Dropout Operation (100% Duty Cycle)
      5. 8.3.5 Soft Start
      6. 8.3.6 Switch Current Limit and HICCUP Short-Circuit Protection
      7. 8.3.7 Undervoltage Lockout
      8. 8.3.8 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable and Disable (EN)
      2. 8.4.2 Output Discharge
      3. 8.4.3 Power Good (PG)
      4. 8.4.4 Output Voltage and Mode Selection (VSET/MODE)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Setting The Output Voltage
        2. 9.2.2.2 Input and Output Capacitor Selection
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
        1. 9.4.2.1 Thermal Considerations
  10. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  11. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

Figure 6-1 TPSM82864A, TPSM82866A - QFN (23 Pin)
Table 6-1 Pin Functions
PIN TYPE(1) DESCRIPTION
NAME NO.
AGND 18 P Analog ground pin. Must be connected to a common GND plane.
EN 1 I Device enable pin. To enable the device, this pin must be pulled high. Pulling this pin low disables the device. Do not leave floating.
FB 17 I Voltage feedback input. Connect the output voltage resistor divider to this pin. When using a fixed output voltage, connect directly to VOUT.
PG 2 O Power-good open-drain output pin. The pullup resistor can be connected to voltages up to 5.5 V. If unused, leave this pin floating. This pin is pulled to GND when the device is in shutdown.
PGND 4, 5, 6, 8, 9, 10, 11, 19, 20 P Power ground pin. Must be connected to common GND plane.
SW 7 O Switch pin of the power stage. This pin can be left floating.
VIN 21, 22 P Power supply input voltage pin
VOS 16 I Output voltage sense pin. This pin must be directly connected to the output capacitor.
VOUT 12, 13, 14, 15 P Output voltage pin
VSET/MODE 3 I Connecting a resistor to GND selects one of the fixed output voltages. Tying the pin high or low selects an adjustable output voltage. After the device has started up, the pin operates as a MODE input. Applying a high level selects forced PWM mode operation and a low level selects power save mode operation.
Exposed Thermal Pad 23 P Internally connected to PGND. Must be soldered to achieve appropriate power dissipation and mechanical reliability. Must be connected to common GND plane.
(1) I = Input, O = Output, P = Power