SLVSE26B November 2017 – April 2018 TPSM84824
The TPSM84824 is designed to operate from an input voltage supply range between 4.5 V and 17 V. This input supply must be well regulated and able to withstand maximum input current and maintain a stable voltage. The resistance of the input supply rail must be low enough that an input current transient does not cause a high enough drop at the TPSM84824 supply voltage that can cause a false UVLO fault triggering and system reset.
If the input supply is located more than a few inches from the TPSM84824 additional bulk capacitance may be required in addition to the ceramic bypass capacitors. Typically, a 47-µF or 100-μF electrolytic capacitor will suffice.