SCDS357A July   2014  – December 2014 TS5A3166-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics for 5-V Supply
    6. 7.6 Electrical Characteristics for 3.3-V Supply
    7. 7.7 Electrical Characteristics for 2.5-V Supply
    8. 7.8 Electrical Characteristics for 1.8-V Supply
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

10.1 Application Information

SPST analog switch is a basic component that could be used in any electrical system design. The following are some basic applications that utilize the TS5A3166, more detailed applications may be found in the Typical Application section.

  1. Gain-control circuit for amplifier
    1. Additional details are available in the Typical Application section.
  2. Improve lock time of a PLL by changing the time constant
    1. Example Diagram:
app1_scds357.gifFigure 22. Improved Lock Time Circuit Simplified Block Diagram
  1. Improve power consumption for PLL
    1. Example Diagram:
app2_scds357.gifFigure 23. PLL Improved Power Consumption Simplified Block Diagram

10.2 Typical Application

typapp_scds357.gifFigure 24. Gain-Control Circuit for OP Amplifier

10.2.1 Design Requirements

Place a switch in series with the input of the op amp. Since the op amp input impedance is very large, a switch on ron(1) is irrelevant.

10.2.2 Detailed Design Procedure

By choosing values of R1 and R2, such that Rx >> ron(x), ron of TS5A3166 can be ignored. The gain of op amp can be calculated as follow:

Equation 1. Vo / VI = 1+ R|| / R3
Equation 2. R|| = (R1+ron(1)) || (R2+ron(2))

10.2.3 Application Curves

grp1_cds187.gifFigure 25. ron vs VCOM
grp3_cds187.gifFigure 27. ron vs VCOM (V+ = 5 V)
grp2_cds187.gifFigure 26. ron vs VCOM (V+ = 3 V)