SLLSF07 September 2017 TUSB215-Q1
Refer to the PDF data sheet for device specific package drawings
To avoid the need for signal vias, it is highly recommend to route the High Speed traces on the same surface layer than the TUSB215-Q1 is placed. shows an example how one could layout the PCB for TUSB215-Q1.
The layout should use impedance controlled traces to maintain 90 Ω differential impedance for the whole signal path as required per USB 2.0 specification. General guidelines for highspeed signal routing apply.